TDA4VM: TI_image generation from Custom secondary bootloader

Hello,

Please see the PDK documentation SBL how to guide:

Primarily refer: Boot from OSPI.

Thanks,

Hi Praveen,

Thank you!

I have created Ti Image with reference of PDK sbl demos.

 Flashed onto OSPI flash, still it is not working.

Q) is it mandatory to use same memory areas as demos?

Kind regards,

Hari krishna Kaki

Hi Hari,

Is this on TI EVM or custom platform?

Hari krishna Kaki said:

I have created Ti Image with reference of PDK sbl demos.

 Flashed onto OSPI flash, still it is not working.

Please let us know the steps followed in detail. it is hard to comment without all the details.

Also specify all the code update done by you.

Hari krishna Kaki said:

Q) is it mandatory to use same memory areas as demos?

Not really. Tell us what you memory you are planning to use and we can comment.

Hello,

I have developed our own SBL and memory usage as below.

OSPI flash mapping our end

0x00000000 - 0x00080000 -SBL

0x00100000 - 0x00230000 -Appl

RAM

0x70000000 -0x7010 0000 -SBL

Attached .bin file and generated Ti image of bin file.7802.bin.zip

I have followed below steps to generate Ti Image, referencing Sbl cust in demos

And a script to flash Ti Imgae to OSPI flash, attached scripts

+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

SET BINDIR=../output/bin
SET SBL_IMAGE_NAME=ARM_TDA4VMCR5_Bootloader_Can
SET SBL_BIN_PATH=%BINDIR%/%SBL_IMAGE_NAME%.bin
SET SBL_ELF_PATH=%BINDIR%/%SBL_IMAGE_NAME%.elf
SET SBL_TIIMAGE_PATH=%BINDIR%/%SBL_IMAGE_NAME%.tiimage
SET SBL_TIIMAGE_SIGNED_PATH=%BINDIR%/%SBL_IMAGE_NAME%.tiimage.signed
SET SBL_RPRC_PATH=%BINDIR%/%SBL_IMAGE_NAME%.rprc
SET SBL_CERT_KEY=C:/ti/j721e/pdk_jacinto_09_00_01_04/packages/ti/build/makerules/rom_degenerateKey.pem

SET X509C_CERT_GEN=-executionpolicy unrestricted -command C:/ti/j721e/pdk_jacinto_09_00_01_04/packages/ti/build/makerules/x509CertificateGen.ps1
SET PDK_SBL_COMP_PATH= C:\ti\j721e\pdk_jacinto_09_00_01_04\packages\ti\boot\sbl
SET SBL_TOOLS_PATH=%PDK_SBL_COMP_PATH%/tools
SET OUT2RPRC_PATH=%SBL_TOOLS_PATH%/out2rprc/bin/out2rprc.exe
SET SBL_IMAGE_GEN=%SBL_TOOLS_PATH%/multicoreImageGen/bin/MulticoreImageGen.exe

SET SBL_RUN_ADDRESS = 0x70000000
SET SBL_HS_ADDRESS=0x00300000
SET SOC = j721e
SET SBL_DEV_ID=55
SET SBL_MCU_STARTUP_MODE=SPLIT_MODE

::powershell -executionpolicy unrestricted -command C:/ti/j721e/pdk_jacinto_09_00_01_04/packages/ti/build/makerules/x509CertificateGen.ps1 -b C:/ti/j721e/pdk_jacinto_09_00_01_04/packages/ti/boot/sbl/binary/j721e_evm/cust/bin/sbl_cust_img_mcu1_0_release.bin -o C:/ti/j721e/pdk_jacinto_09_00_01_04/packages/ti/boot/sbl/binary/j721e_evm/cust/bin/sbl_cust_img_mcu1_0_release.tiimage -c R5 -l 0x41C00100 -k C:/ti/j721e/pdk_jacinto_09_00_01_04/packages/ti/build/makerules/rom_degenerateKey.pem -d DEBUG -j DBG_FULL_ENABLE -m SPLIT_MODE
powershell %X509C_CERT_GEN% -b %SBL_BIN_PATH% -o %SBL_TIIMAGE_PATH% -c R5 -l 0x70000000 -k %SBL_CERT_KEY% -d DEBUG -j DBG_FULL_ENABLE -m %SBL_MCU_STARTUP_MODE%

_Tiimage_J721e.zip

+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

After flashing, i have done Boot mode change setting and a power recycle.

Please let me know any thing i'm missing here.

I am on out of office till Tuesday (US holiday). This need to consult the team & will respond once I am back in office

How are you loading the TIFS binary (system firmware binary)?

See:  https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/10_01_00_04/exports/docs/pdk_jacinto_10_01_00_25/docs/userguide/jacinto/boot/boot_k3.html 

Hello Praveen,

I have remapped my SBL memory as per TI Demo SBL, now my SBL is verified by RBL and copied to RAM.

After copying to RAM, i have an issue with Relocation of  CSL Vectors to ATCM.

I have used following function to relocate vectors, referencing "utilsCopyVecs2ATcm.asm" from TI pdk

Vector relocation is working when i use Debug_spinLock() function after startup

If i disable Debug_spinLock() function after startup, my SBL is not working and going to exit/abort function.

because of Vectors are not relocated to ATCM area.

Issue: After power on Reset vectors are not relocating, when Debug_spinLock() is not using.

Any hints here ?

Hi Hari,

Not sure why you are seeing this. We will have to ask the dev team if they have any ideas about this &  get back.

Our feedback from the dev team is to closely follow all the steps mentioned in the default SBL source code provided in the PSDK RTOS release.

<PSDK_RTOS>/pdk_<version>/packages/ti/boot/sbl/board/k3/sbl_main.c

Any major deviation from the standard flow is hard for us to support.

Also, we see that the memory map you are using is violating some reserve sections as described here --> 

https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/10_01_00_04/exports/docs/pdk_jacinto_10_01_00_25/docs/userguide/jacinto/boot/boot_k3.html#memory-map

Regarding the vector relocation, the asm file  (& function RelocVect2Atcm) you use is not the one you must use.  Look at the sbl_main.c file where in line number 319, how it is taken care of by the standard SBL code.

Thanks.

Also, on reset vector:

reset vecs for R5F are already pre-defined in our CSL startup code for the R5, in : ti/csl/arch/r5/src/startup/resetvecs.asm

Look for _resetvectors in that file (and the associated .sect ".rstvectors" definition).

Thanks.

Hello,

Now there is memory violation, and adapted Sbl demo memory map

Still not working.

Yes, _resetvectors are predefine, but reset vectors are not loaded at 0x00000000 by default.

After Sbl startup, Sbl is copying reset vectors to 0x00000000(TCM memory)

We are doing the same here.

Hi, I'm not sure what the question here is.

We suggest following the SBL flow provided in the PSDK RTOS. If you are deviating from the TI SBL's standard flow, it would be hard for us to support you.

Thanks.

Can you check the above - why they are different?