DRA821U: POST DDR4 Memory Testing

David Arneson

Prodigy 40 points

Part Number: DRA821U

Tool/software:

Looking to test a portion of DDR4 memory from U-Boot as a Power On Self Test.

In the U-Boot initialization sequence on common/board_r.c where is the best place to add the test?

How to get a safe block of memory not being used by U-Boot?

How to access physical top of memory?

over 1 year ago

0 Keerthy J over 1 year ago

TI__Guru**** 168820 points

Hi David,

This feature isn't supported in the SDK. Are you looking at implementing this on your own?

Best regards,

Keerthy

0 David Arneson over 1 year ago in reply to Keerthy J

Prodigy 40 points

Yes we are looking at implementing this ourselves. Hoping TI can assist with a few answers.

0 Keerthy J over 1 year ago in reply to David Arneson

TI__Guru**** 168820 points

David,

R5 SPL initialises DDR. Then all the execution happens from the DDR. Can you elaborate what is the section of memory that needs to be tested?

Best regards,

Keerthy

0 David Arneson over 1 year ago in reply to Keerthy J

Prodigy 40 points

Looking to test a large contiguous block of memory which is not being utilized by U-Boot.

0 Keerthy J over 1 year ago in reply to David Arneson

TI__Guru**** 168820 points

Anything beyond 0x90000000 is not really used by U-Boot. Any place after R5 SPL inits DDR is good. Any board specific function executed at U-BOOT should be fine. That said there may be unknown issues that we cannot foresee as this is not tried at our end.

Best regards,

Keerthy

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DRA821U: POST DDR4 Memory Testing