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C5515 I2C Timeout using CSL

I am using the CSL to interface to an I2C flash and I can single step through my code but I get CSL_I2C_TIMEOUT_ERROR when I don't single step.  Looking at the csl_i2c.c file I see that it is caused by the ICXRDY (I2C_write) or the ICRRDY (I2C_read) not being set.  I noticed in the example code that delays were added, see example code below.  Are these delays required and if they are, how long do they need to be?

    /* Write data */
    status = I2C_write(gI2cWrBuf, (CSL_I2C_DATA_SIZE + CSL_EEPROM_ADDR_SIZE),
                       CSL_I2C_EEPROM_ADDR, TRUE, startStop,
                       CSL_I2C_MAX_TIMEOUT);
    if(status != CSL_SOK)
    {
        printf("I2C Write Failed!!\n");
        return(result);
    }

    printf("I2C Write Complete\n");

    /* Give some delay */
    for(looper = 0; looper < CSL_I2C_MAX_TIMEOUT; looper++){;}

    /* Write data EEPROM page address for read operation */
    status = I2C_write(gI2cWrBuf, CSL_EEPROM_ADDR_SIZE, CSL_I2C_EEPROM_ADDR,
                       TRUE, startStop, CSL_I2C_MAX_TIMEOUT);
    if(status != CSL_SOK)
    {
        printf("I2C Write Failed!!\n");
        return(result);
    }

    /* Give some delay */
    for(looper = 0; looper < CSL_I2C_MAX_TIMEOUT; looper++){;}

    /* Read data */
    status = I2C_read(gI2cRdBuf, CSL_I2C_DATA_SIZE, CSL_I2C_EEPROM_ADDR,
                       TRUE, startStop, CSL_I2C_MAX_TIMEOUT, FALSE);
    if(status != CSL_SOK)
    {
        printf("I2C Read Failed!!\n");
        return(result);
    }

    printf("I2C Read Complete\n");

  • Hi Robert,

    Yes, these delays are required  to account for the internal write cycle time of the I2C flash. These delay are specified in flash manufacturer datasheets (usually around 5 ms but depends on device). Flash (especially EEPROMs) are much slower than the DSP and single stepping provides ample time for this. However when the DSP is running free, the time between the instructions is 1/CPU_Frequency and unless you are running the CPU very slow, you will need to add in the delay to be assured of correct operation.

    Regards,

    Sunil