This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

C6742 boot issue

Other Parts Discussed in Thread: ADS1158

Hi

I'm not sure if this is really a boot issue, but since it only occurs during boot I hope it gives one of the gurus here a clue:

I have a custom C6742 board which uses SPI1 and UART0. I have a test application that flashes some leds, and this application works fine both when I run it from the debugger and when I program it into the flash chip and boot from SPI1 flash.

I have the real application that collects samples from an ADC on SPI1 and sends processed data out over UART0. This application works fine if I run it from the debugger. However, when I boot this program from the flash chip, it does collect data from the ADC, but will not transmit over UART0. Strange thing is, if I connect the debugger and restart the processor (without changing any settings), it does transmit over UART0.

Both the test application and the real application run from mDDR2 memory.

My AISgen configuration file is here: 

Boot Mode=SPI1 Flash
Boot Speed=5
Flash Width=0
Flash Timing=3ffffffc
Configure Peripheral=True
Configure PLL0=True
Configure SDRAM=False
Configure PLL1=True
Configure DDR2=True
Configure LPSC=True
Configure Pinmux=False
Enable CRC=False
Specify Entrypoint=False
Enable Sequential Read=False
Use 4.5 Clock Divider=False
Use DDR2 Direct Clock=False
Use mDDR=True
ROM ID=2
Device Type=1
Input Clock Speed=24
Clock Type=0
PLL0 Pre Divider=1
PLL0 Multiplier=25
PLL0 Post Divider=3
PLL0 Div1=1
PLL0 Div3=2
PLL0 Div7=6
PLL1 Multiplier=25
PLL1 Post Divider=4
PLL1 Div1=1
PLL1 Div2=2
PLL1 Div3=3
Entrypoint=c0000000
SDRAM SDBCR=0
SDRAM SDTMR=0
SDRAM SDRSRPDEXIT=0
SDRAM SDRCR=0
DDR2 PHY=84
DDR2 SDCR=134621
DDR2 SDCR2=0
DDR2 SDTIMR=16923209
DDR2 SDTIMR2=3d0cc722
DDR2 SDRCR=492
LPSC0 Enable=3+4+5+6+9+10+11+12+
LPSC0 Disable=
LPSC0 SyncRst=
LPSC1 Enable=1+2+3+4+5+7+9+10+11+12+13+14+15+16+17+18+19+
LPSC1 Disable=
LPSC1 SyncRst=
Pinmux=0:44000000+4:11441100+5:111111+8:88800+10:8000000+14:8+18:800+19:88800+
App File String=U:\Projects\PJ0095_-_Metatronics_-_Motion9\FLled\Debug\FLled.out
AIS File Name=U:\Projects\PJ0095_-_Metatronics_-_Motion9\FLled\Debug\FLled4.bin
. Note that I do enable LPSC 9 (UART0) in PSC0.

Does anyone have a clue what could be going on here? Is it perhaps a timing issue?

And any ideas how to solve it? Should I (re-)enable UART0 in software? How?

Best regards

Admar

  • I've debugged this a little further, and it seems that the problem is not with the UART, but somewhere else:

    In the program, I have a hardware interrupt service routine that fills a buffer with samples from an ADC. If the buffer is full, it sends a message with MBX_post (timeout is set to 0) and switches to a different buffer.

    The program also has a task that listens to this mailbox, and if it gets a message, it will process the buffer that was just filled by the ISR.

    I haven't nailed the issue down completely yet, but it seems now that if the processor boots over SPI flash with this program, either MBX_post in the ISR doesn't send a message, or MBX_pend doesn't receive one. If I run this program by loading it in memory using the debugger, or if I halt execution and restart the target with the debugger, the program behaves as expected.

    I wonder now: Is it allowed to do a MBX_post() with timeout set to 0 in an ISR (HWI)? Or should I use something like QUE_put() and SEM_post() in the ISR (as is suggested on page 2-422 of SPRU403R)?

    BTW: I'm using DSP/BIOS 5.41.09.34.

    Admar

  • Solved the issue. Turns out that the DSP (C6742) was much faster in starting up than the ADC (ADS1158).

    Booting works reliably now on our custom board.

    BTW: The AISgen file above is working for C6742 and ISSI IS43DR16160A mDDR2 memory.

    Admar