I was using a g729 codec from TI provided, and I had to call this codec multi-threads for my company's product.
Unexpectedly, the speech only can call about 20 calls at the same time, and C674 core had run fully.
Therefore, I search many information about optimization for DSP running codec g729, there were some post said that set MAR register for opening cache in c674.
Then, I set L1D_cache、L1P_cache and L2_cache
var Cache = xdc.useModule('ti.sysbios.family.c64p.Cache');
Cache.MAR0_31 = 0xffffffff;
Cache.MAR32_63 = 0xffffffff;
Cache.MAR64_95 = 0xffffffff;
Cache.MAR96_127 = 0xffffffff;
Cache.MAR128_159 = 0xffffffff;
Cache.MAR160_191 = 0xffffffff;
Cache.MAR192_223 = 0xffffffff;
Cache.MAR224_255 = 0xffffffff;
Cache.initSize.l1pSize = Cache.L1Size_32K;
Cache.initSize.l1dSize = Cache.L1Size_32K;
Cache.initSize.l2Size = Cache.L2Size_256K;
DSP performance had improved, but ARM usage increased when I opened the DSP cache, has any method to solved this problem?
Also, I obey to Bios_User_Guide to minimize the application footprint.,there is no any effect on performance.
