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PROCESSOR-SDK-J784S4: WIZ Documentation and Block Diagrams

Abdelhakim DAOUDI
Prodigy 60 points
Part Number: PROCESSOR-SDK-J784S4
Other Parts Discussed in Thread: TDA4VM

Tool/software:

Hello,

 

I am trying to set up a loopback on a SerDes lane.

 After checking the SDK, I found that the only loopback types used in CSL_serdesSetLoopback are “line” and “ser”. This function configures the WIZ registers.

 

In Tab 247 of the J784_Registers_20240628.xlsx file, I identified multiple registers related to loopback, suggesting that several configurations are possible. However, the differences between these loopback types are not entirely clear.

 

Is there any documentation that provides a more detailed explanation of the WIZ module in the SerDes? Ideally, a block diagram illustrating the inputs and outputs would be very helpful.

 

Thank you

  • 0
    TI__Guru** 113435 points

    Hi Abdelhakim,

    Abdelhakim DAOUDI said:
    Is there any documentation that provides a more detailed explanation of the WIZ module in the SerDes? Ideally, a block diagram illustrating the inputs and outputs would be very helpful.

    The WIZ module is the SerDes IP.

    Please look through chapter 12.2.5 Serializer/Deserializer (SerDes) of the J784S4 TRM.

    regards

    Suman

  • 0 in reply to Suman Anna
    Prodigy 110 points

    Hi Suman,

    We have identified the section in the TRM that mentions the SerDES can be configured in loopback mode: "Serial bit stream and parallel word loopback for both line and parallel side."

    Could you confirm that CSL_SERDES_LOOPBACK_SER is used to enable loopback, simulating the connection of the TX differential pair to the RX? Additionally, we would like to verify that CSL_SERDES_LOOPBACK_LINE behaves as if the input and output are connected on the peripheral side.

    Best regards,
    Romain

  • 0 in reply to Romain Guilloteau
    TI__Guru** 113435 points

    Hi Romain,

    Please raise your latest SerDes functional behavior related question in a separate thread, since the original topic in the thread title is answered.

    regards

    Suman

  • 0 in reply to Suman Anna
    Prodigy 60 points

    Thank you.

    I found some information regarding the WIZ configuration elsewhere in the TRM.

    However, I could not find the mentioned section, '10-G SerDes Programming Guide'.

    Could you please indicate where it is?

    Best regards,

  • 0 in reply to Abdelhakim DAOUDI
    TI__Guru 52873 points

    Hi Abdelhakim,

    SerDes Programming Guide section was a section that did not get added back when J721E/TDA4VM was developed with this WIZ IP block. We have reused the IP block from J721E in J784S4, so most likely the sections in TRM also got copied over. As such, there is no 10-G SerDes Programming Guide unfortunately.

    In any case, this loopback feature is testing and diagnostics of the SerDes block. SerDes is used in the context of PCIe, ethernet, USB, or display, so customers do not have a need to test only SerDes block. So, usually no usage for this feature.

    What is the usecase here?

    Regards,

    Takuma