Hello, everyboy !
I am using TMS320C6618 AIF2 for some applications. 6618 connects with FPGA through AIF2 Serdes interface( link 4).
Now DSP Tx sync is ok, but Rx sync always fails, the value of RM Link Status 0 Register is 0x201 or 0x204( always changing between them ).
As the user guide SPRUGV7B said, the error bit 9 means " Detects when num_los counter has reached the program able los_det_thold limit " ,
I think that is why my Rx link sync is often not stable.(P145 Table7-5).
some configuration code as follows:
//RM link setup
RmLinkSetup.bEnableRmLink = TRUE;
RmLinkSetup.RmFifoThold = CSL_AIF2_RM_FIFO_THOLD_4DUAL;//CSL_AIF2_RM_FIFO_THOLD_IMMEDIATELY;
RmLinkSetup.RmErrorSuppress = CSL_AIF2_RM_ERROR_ALLOW;
RmLinkSetup.bEnableSdAutoAlign = FALSE;
RmLinkSetup.bEnableScrambler = FALSE;
RmLinkSetup.bEnableLcvUnsync = FALSE;
RmLinkSetup.bEnableLcvControl = FALSE;//TRUE;
RmLinkSetup.bEnableWatchDog = TRUE;// FALSE;
RmLinkSetup.WatchDogWrap = 0xFF;//set watch dog wrap value
RmLinkSetup.bEnableClockQuality = TRUE;//FALSE;
RmLinkSetup.ClockMonitorWrap = 8000;//0 11.9
RmLinkSetup.losDetThreshold = RM_LOS_DET_THOLD;
RmLinkSetup.SyncThreshold = RM_SYNC_THOLD;
RmLinkSetup.FrameSyncThreshold = RM_SYNC_THOLD;
RmLinkSetup.UnsyncThreshold = RM_UNSYNC_THOLD;
RmLinkSetup.FrameUnsyncThreshold = RM_UNSYNC_THOLD;
the registers related to Rx status and configuration are:
name address value
RM_LK_CFG0[4] 0x01f52000 0x00008007
RM_LK_CFG1[4] 0x01f52004 0x1F4003FF
RM_LK_CFG2[4] 0x01f52008 0x0000000A
RM_LK_CFG3[4] 0x01f5200C 0x00010001
RM_LK_CFG4[4] 0x01f52010 0x00050005
RM_LK_STS0[4] 0x01f52014 0x00000204
RM_LK_STS1[4] 0x01f52018 0xFFFF000A
RM_LK_STS2[4] 0x01f5201C 0x00003E80
I want to disable the function of loss detection, so that the num los cnt will always be 0, not exceeding the los_det_thold .I have tyied many ways, but all failed. I hope you can help me. How to disable the Rx loss detection ?
Thank you!
Best regards.
Tao
