TDA4VH-Q1: RTOS SDK 10_01 SBL debug tiimage comes error

Hi,

Z. Xia said:

Flashing with debug tiimage it doesn't work. flashOpen failed. if set Debug_spinLock() in the begin of main(), before firmware load.

The debug tiimage working fine, Seems like your code stuck in Debug_spinLock() function.

Set some SBL_log() to your function to make it easier to understand, and set log level 3 on the sbl_component.mk file to get the full SBL log on the uart console.

# SBL log level
# no logs = 0, only errors =1, normal logs = 2, all logs = 3

SBL_CFLAGS += -DSBL_LOG_LEVEL=3

Regards,

Karthik

Hallo, we think the issue could be in the mux of OSPI NOR and NAND. 

for the board we have 3 Flash devices.  How we can know which device is selected by bootup. As my understanding the XSPI mode is set through SW11 and SW7, but XSPI means for OSPI0 or OSPI 1, is the ROM code of MCU R5F will detect it ? How is the MUX of flash Register is set?  special for the CCS studio debug and flashing.

Have you detailed info. about that?

Hi,

Could you please tell me if you are using a custom board or TI EVM?

Regards,

Karthik

yes, E5

Hi,

Z. Xia said:

yes, E5

What is stands for E5? if its custom board could you share your 3 Flash devices details? 

Regards,

Karthik

sorry it was revision E5 EVM board from TI. not board from 3rd party.  I thought the custom board is TI board.

Hi,

Z. Xia said:

As my understanding the XSPI mode is set through SW11 and SW7

Yes , ROM Bootloader (RBL) determines the flash device based on the BOOTMODE pins set by SW11 and SW7.

Z. Xia said:

How we can know which device is selected by bootup

 You can check devstate (CTRLMMR_WKUP_DEVSTAT) register to know which device selected ,it will reflecting to your boot mode.

Z. Xia said:

XSPI means for OSPI0 or OSPI 1

It is OSPI0.

Z. Xia said:

is the ROM code of MCU R5F will detect it ?

Yes. and could you please refer the link software-dl.ti.com/.../boot_k3.html

Z. Xia said:

How is the MUX of flash Register is set?  special for the CCS studio debug and flashing.

ROM Code configure the MUX based on the selected BOOTMODE pins. and GEL scripts to set the MUX registers in ccs. 

Regards,

Karthik

as bootmode pin is selected by SW11 and SW7 with XSPI mode, how ROM knows it is from NAND or NOR ? it is from SW2.1?   if it is off, then the mux shall select NOR of OPSI0, right?

by the way how to select OPSI1, as XSPI is only for OPSI0?

Hi Z.Xia,

Z. Xia said:

how ROM knows it is from NAND or NOR ? it is from SW2.1?

Yes, It is NAND boot mode when SW2.1 is ON, and NAND uses OSPI0 as well.

https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-j784s4/10_01_00_04/exports/docs/psdk_rtos/docs/user_guide/evm_setup_j784s4.html#xspi-boot-mode 

Z. Xia said:

by the way how to select OPSI1, as XSPI is only for OPSI0?

 OSPI1 is used by QSPI flash.

Regards,

Karthik

as the evm setup chapter not mentioned the QSPI mode, only XSPI mode, but now is clarifed, that for the user, only set the SW7,11,and 2.1 then the boot mode selection of Flash is deterministic.