PROCESSOR-SDK-J784S4: Enable Micron OSPI flash in PSDK RTOS J784S4

Milena Milosevic

Expert 1115 points

Part Number: PROCESSOR-SDK-J784S4
Other Parts Discussed in Thread: TDA4VH

Tool/software:

Hello TI,

We do have custom board based on the TDA4VH.

We are using Processor SDK J784S4, version 10.00.

We do have Micron OSPI flash : MT35XU512ABA1G12-0AAT , which we would like to enable in SDKs.

For Linux, we have successfully enabled it, and are using it.
For the PROCESSOR SDK RTOS, we do have challenges in enabling it.

For RTOS, we do have two use-case scenarios, which fail with the same error: Board_flashOpen failed.

Scenario 1: Boot SBL from the OSPI (SBL, tifs and app)

In the sbl/src/ospi/sbl_ospi.c we have changed (all occurrences in file) default define for j784s4 to be : BOARD_FLASH_ID_MT35XU512ABA1G12 .
In PDK (board_cfg.h) we have disabled BOARD_NAND_FLASH_IN , since we do not have NAND Flash on our custom board
In PDK (../board/src/flash/nor/ospi/nor_xspi.h), include to be changed to ti/board/src/flash/nor/device/??? (Currently it is : ti/board/src/flash/nor/device/s28hs512t.h). This should be replaced with proper one? We have found proper mt35**.h file in the j721e SDK.
What else should be done/taken over from j721e in order to have this functional?

Scenario 2: Flash OSPI via UART

Similar as above, in the uart_programmer defines for the flash.
In PDK/board same questions as above.

What all is needed to change in the PDK/board to be changed in order to support NOR flash MT35XU512ABA1G12 ?

Best regards,

Milena

7 months ago

0 Tanmay Patil 7 months ago

TI__Mastermind 38990 points

Hi Milena,

Do you have CCS access. Can you step into the SBL code and check where inside "Board_flashOpen" is the app failinng?

Regards,
Tanmay

0 Milena Milosevic 7 months ago in reply to Tanmay Patil

Expert 1115 points

Hello Tanmay,

We can conclude in some of the ways (prints or CCS where it is failing).

Maybe I have not summarized well above. Let me explain further SBL use case:

1. Original code is failing in this function, which is expected since PDK not properly configured.

2. After adding changes from first two points from above (sbl/src/ospi/sbl_ospi.c and board_cfg.h), it is still failing (Build is OK, Boot is NOK)

-> we have not investigated this deeper, since we figured out that wrong device is included in the board/src/flash/nor/ospi/nor_xspi.h file . point 3 from above.

3. After copying the missing header file from the j721e SDK, and including here, we have build errors (example below).

src/flash/nor/ospi/nor_xspi.c:138:14: error: use of undeclared identifier 'NOR_CMD_RDREG'
    cmd[0] = NOR_CMD_RDREG;

These defines are used from the nor_xspi.c file, and are defined in the device/s28hs512t.h .

tisdk@mcs104:~/rtos-git-clean/ti-processor-sdk-rtos-j784s4-evm-10_00_00_05/pdk_j784s4_10_00_00_27/packages/ti/build$ find ../board/ -iname "*.c" | xargs grep "NOR_CMD_RDREG"
../board/src/flash/nor/ospi/nor_xspi.c:    cmd[0] = NOR_CMD_RDREG;
../board/src/flash/nor/ospi/nor_xspi.c:        cmd[0] = NOR_CMD_RDREG;
tisdk@mcs104:~/rtos-git-clean/ti-processor-sdk-rtos-j784s4-evm-10_00_00_05/pdk_j784s4_10_00_00_27/packages/ti/build$ find ../board/ -iname "*.h" | xargs grep "NOR_CMD_RDREG"
../board/src/flash/nor/device/s28hs512t.h:#define NOR_CMD_RDREG                (0x65U)
tisdk@mcs104:~/rtos-git-clean/ti-processor-sdk-rtos-j784s4-evm-10_00_00_05/pdk_j784s4_10_00_00_27/packages/ti/build$

We would like to understand what all is needed in order to integrate properly Micron, are the above steps proper, or some of them shall not be done?

What is missing in order to integrate this properly? What else should be changed?

Best regards,

Milena

0 Tanmay Patil 7 months ago in reply to Milena Milosevic

TI__Mastermind 38990 points

Hi Milena,

There would also be a micron flash header. You can try to use that instead of " device/s28hs512t.h". This is because, we have the same micron flashes on other EVMs.

Let me know if you can't find it.

Regards,
Tanmay

0 Milena Milosevic 7 months ago in reply to Tanmay Patil

Expert 1115 points

Hello Tanmay,

We have tried to use Micron flash header. And we have build errors after that one. nor_xspi.c asked for defines which are only present in the device/s28hs512t.h and not in the device/mt35***.h

These are the error examples:

Milena Milosevic said:
After copying the missing header file from the j721e SDK, and including here, we have build errors (example below).
Fullscreen
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src/flash/nor/ospi/nor_xspi.c:138:14: error: use of undeclared identifier 'NOR_CMD_RDREG'
cmd[0] = NOR_CMD_RDREG;
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
src/flash/nor/ospi/nor_xspi.c:138:14: error: use of undeclared identifier 'NOR_CMD_RDREG'
    cmd[0] = NOR_CMD_RDREG;
These defines are used from the nor_xspi.c file, and are defined in the device/s28hs512t.h .

Fullscreen
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tisdk@mcs104:~/rtos-git-clean/ti-processor-sdk-rtos-j784s4-evm-10_00_00_05/pdk_j784s4_10_00_00_27/packages/ti/build$ find ../board/ -iname "*.c" | xargs grep "NOR_CMD_RDREG"
../board/src/flash/nor/ospi/nor_xspi.c: cmd[0] = NOR_CMD_RDREG;
../board/src/flash/nor/ospi/nor_xspi.c: cmd[0] = NOR_CMD_RDREG;
tisdk@mcs104:~/rtos-git-clean/ti-processor-sdk-rtos-j784s4-evm-10_00_00_05/pdk_j784s4_10_00_00_27/packages/ti/build$ find ../board/ -iname "*.h" | xargs grep "NOR_CMD_RDREG"
../board/src/flash/nor/device/s28hs512t.h:#define NOR_CMD_RDREG (0x65U)
tisdk@mcs104:~/rtos-git-clean/ti-processor-sdk-rtos-j784s4-evm-10_00_00_05/pdk_j784s4_10_00_00_27/packages/ti/build$

Best regards,

Milena

0 Tanmay Patil 7 months ago in reply to Milena Milosevic

TI__Mastermind 38990 points

Hi Milena,

Let me check regarding this with our dev team. Please expect a response by tomorrow.

Regards,
Tanmay

0 Milena Milosevic 6 months ago in reply to Tanmay Patil

Expert 1115 points

Hello Tanmay,

Any update regarding this?

Best regards,

Milena

+1 Tanmay Patil 6 months ago in reply to Milena Milosevic

TI__Mastermind 38990 points

Hi Milena,

Sorry for the delay on this,

Can you update the "Nor_config" for j784s4 in "packages/ti/board/src/flash/nor/nor.c" to have "Nor_ospiFxnTable" instead of "Nor_xspiFxnTable".

The "Nor_ospiFxnTable" is used for micron flash.

Regards,
Tanmay

+1 Milena Milosevic 6 months ago in reply to Tanmay Patil

Expert 1115 points

Hello Neehar,

We have updated Nor_config as suggested. Also in order for code to be buidalble, we have removed nor_xspi from the build and included nor_ospi.c/.h files from j721e pdk. Changed makefiles and includes as needed.

Binaries are flashed successfully , but the boot fails, magic number invalid. I guess this is due to improper reading from the OSPI. Logs are below.

Flash log:

=> setenv ipaddr 192.168.238.203
=> setenv serverip 192.168.238.115
=> setenv gatewayip 192.168.238.1
=> setenv netmask 255.255.255.0
=> sf probe
k3-navss-ringacc ringacc@2b800000: Ring Accelerator probed rings:286, gp-rings[96,20] sci-dev-id:328
k3-navss-ringacc ringacc@2b800000: dma-ring-reset-quirk: disabled
SF: Detected mt35xu512aba with page size 256 Bytes, erase size 4 KiB, total 64 MiB
=> tftp ${loadaddr} tiboot3.bin
am65_cpsw_nuss_port ethernet@46000000port@1: K3 CPSW: rflow_id_base: 2
link up on port 1, speed 1000, full duplex
Using ethernet@46000000port@1 device
TFTP from server 192.168.238.115; our IP address is 192.168.238.203
Filename 'tiboot3.bin'.
Load address: 0x82000000
Loading: #################################################################
         #  0 Bytes
         669.9 KiB/s
done
Bytes transferred = 332806 (51406 hex)
=> sf update $loadaddr 0x0 $filesize
device 0 offset 0x0, size 0x51406
332806 bytes written, 0 bytes skipped in 1.605s, speed 211936 B/s
=> tftp ${loadaddr} tifs.bin
am65_cpsw_nuss_port ethernet@46000000port@1: K3 CPSW: rflow_id_base: 2
link up on port 1, speed 1000, full duplex
Using ethernet@46000000port@1 device
TFTP from server 192.168.238.115; our IP address is 192.168.238.203
Filename 'tifs.bin'.
Load address: 0x82000000
Loading: ###############################  0 Bytes
         672.9 KiB/s
done
Bytes transferred = 158666 (26bca hex)
=>  sf update $loadaddr 0x80000 $filesize
device 0 offset 0x80000, size 0x26bca
158666 bytes written, 0 bytes skipped in 0.792s, speed 204113 B/s
=> tftp ${loadaddr} app
am65_cpsw_nuss_port ethernet@46000000port@1: K3 CPSW: rflow_id_base: 2
link up on port 1, speed 1000, full duplex
Using ethernet@46000000port@1 device
TFTP from server 192.168.238.115; our IP address is 192.168.238.203
Filename 'app'.
Load address: 0x82000000
Loading: ################################  0 Bytes
         682.6 KiB/s
done
Bytes transferred = 163708 (27f7c hex)
=> sf update $loadaddr 0x100000 $filesize
device 0 offset 0x100000, size 0x27f7c
163708 bytes written, 0 bytes skipped in 0.842s, speed 198386 B/s
=>

Boot log:

Type [C-a] [C-h] to see available commands
Terminal ready
SBL Revision: 01.00.10.01 (Feb 24 2025 - 14:16:41)
TIFS  ver: 10.0.8--v10.00.08 (Fiery Fox)
SCISERVER Board Configuration header population... PASSED
Sciclient_setBoardConfigHeader... PASSED
Setting GTC clock parent frequency....
Setting GTC clock parent frequency....done
Initlialzing PLLs ...done.
InitlialzingClocks ...done.
Initlialzing DDR ...done.
Initializing GTC ...Copying EEPROM content to DDR ...

 Failed to copy EEPROM Data !!
EEPROM Data Copy Done.
Booting HSM core ...
OSPI RCLK running at 200000000 MHz.

 HSM Binary is not present..

 Continuing with normal boot..
Failed to boot HSM core !!
Begin parsing user application
Calling Sciclient_procBootRequestProcessor, ProcId 0x20...
Calling Sciclient_procBootRequestProcessor, ProcId 0x21...
Calling Sciclient_procBootRequestProcessor, ProcId 0x22...
Calling Sciclient_procBootRequestProcessor, ProcId 0x23...
Calling Sciclient_procBootRequestProcessor, ProcId 0x24...
Calling Sciclient_procBootRequestProcessor, ProcId 0x25...
Calling Sciclient_procBootRequestProcessor, ProcId 0x26...
Calling Sciclient_procBootRequestProcessor, ProcId 0x27...
Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
Calling Sciclient_procBootRequestProcessor, ProcId 0x2...
Calling Sciclient_procBootRequestProcessor, ProcId 0x6...
Calling Sciclient_procBootRequestProcessor, ProcId 0x7...
Calling Sciclient_procBootRequestProcessor, ProcId 0x8...
Calling Sciclient_procBootRequestProcessor, ProcId 0x9...
Calling Sciclient_procBootRequestProcessor, ProcId 0xa...
Calling Sciclient_procBootRequestProcessor, ProcId 0xb...
Calling Sciclient_procBootRequestProcessor, ProcId 0x30...
Calling Sciclient_procBootRequestProcessor, ProcId 0x31...
Calling Sciclient_procBootRequestProcessor, ProcId 0x32...
Calling Sciclient_procBootRequestProcessor, ProcId 0x33...
Calling Sciclient_procBootRequestProcessor, ProcId 0x80...
OSPI RCLK running at 166666666 MHz.
Ospi Read speed for 0x4 bytes from offset 0x100000 = 0 Mbytes per sec
Searching for X509 certificate ...not found
Ospi Read speed for 0x10 bytes from offset 0x100000 = 0 Mbytes per sec
Invalid magic number in Single image header
SBL_ospiClose called
Sciclient_procBootReleaseProcessor, ProcId 0x20...
Sciclient_procBootReleaseProcessor, ProcId 0x21...
Sciclient_procBootReleaseProcessor, ProcId 0x22...
Sciclient_procBootReleaseProcessor, ProcId 0x23...
Sciclient_procBootReleaseProcessor, ProcId 0x24...
Sciclient_procBootReleaseProcessor, ProcId 0x25...
Sciclient_procBootReleaseProcessor, ProcId 0x26...
Sciclient_procBootReleaseProcessor, ProcId 0x27...
Sciclient_procBootReleaseProcessor, ProcId 0x1...
Sciclient_procBootReleaseProcessor, ProcId 0x2...
Sciclient_procBootReleaseProcessor, ProcId 0x6...
Sciclient_procBootReleaseProcessor, ProcId 0x7...
Sciclient_procBootReleaseProcessor, ProcId 0x8...
Sciclient_procBootReleaseProcessor, ProcId 0x9...
Sciclient_procBootReleaseProcessor, ProcId 0xa...
Sciclient_procBootReleaseProcessor, ProcId 0xb...
Sciclient_procBootReleaseProcessor, ProcId 0x30...
Sciclient_procBootReleaseProcessor, ProcId 0x31...
Sciclient_procBootReleaseProcessor, ProcId 0x32...
Sciclient_procBootReleaseProcessor, ProcId 0x33...
Sciclient_procBootReleaseProcessor, ProcId 0x80...

Additional question:

Do we need to set also last param of the Nor_config? It is NULL for j784s4, and for the j721e I see it is populated with the: Nor_hpfFxnTable .

Best regards,

Milena

0 Tanmay Patil 6 months ago in reply to Milena Milosevic

TI__Mastermind 38990 points

Hi Milena,

It is NULL for j784s4. That is fine.

Can you try with changing the baud rate in "packages/ti/drv/spi/soc/j784s4/SPI_soc.c" to "8" in "ospiInitCfg".

Regards,
Tanmay

0 Milena Milosevic 6 months ago in reply to Tanmay Patil

Expert 1115 points

Hello Tanmay,

Tried with changing baudrate value from 0 to 8, but still same logs.

OSPI RCLK running at 166666666 MHz.
Ospi Read speed for 0x4 bytes from offset 0x100000 = 0 Mbytes per sec
Searching for X509 certificate ...not found
Ospi Read speed for 0x10 bytes from offset 0x100000 = 0 Mbytes per sec
Invalid magic number in Single image header
SBL_ospiClose called

Best regards,

Milena

0 Tanmay Patil 6 months ago in reply to Milena Milosevic

TI__Mastermind 38990 points

Hi Milena,

Is it possible for you to take a dump of OSPI reg values in linux (working) and in RTOS (not working)

For linux u-boot, you can use the command "md". On RTOS you can use CCS. For RTOS, please stop just before the failing read to read the registors.

The range for OSPI variales is 0x47040000 - 0x470400FC.

Regards,
Tanmay

0 Milena Milosevic 6 months ago in reply to Tanmay Patil

Expert 1115 points

Hello Tanmay,

Below are dumps of reisteres

From Linux u-boot(booted from OSPI):

=> md 0x47040000
47040000: c1183881 00000300 00000002 030c010c  .8..............
47040010: 00000101 00101003 00000080 00000000  ................
47040020: 00000000 00000000 00000000 00000000  ................
47040030: 00000001 00000001 00010005 ffffffff  ................
47040040: 00000000 00000000 00000000 00000000  ................
47040050: 00000000 00000000 00000000 00000000  ................
47040060: 00000000 00000000 00280000 00000000  ..........(.....
47040070: 00000000 ffffffff 00000000 00000000  ................
47040080: 0000000f 00000000 00000000 00000000  ................
47040090: 00000000 00000000 00000000 00000000  ................
470400a0: 00000000 00000000 000000e7 00000000  ................
470400b0: 00000000 00000000 00800000 00000000  ................
470400c0: 00000000 00000000 00000000 00000000  ................
470400d0: 00000000 00000000 00000000 00000000  ................
470400e0: fdedfa99 06f90000 00000000 00000000  ................
470400f0: 00000000 00000000 00000000 03000300  ................

From RTOS SBL, we printed before the read function from code, as below:

        for (uint32_t regAddr = 0x47040000; regAddr <= 0x470400FC; regAddr+=4)
        {
            uint32_t val = *(uint32_t *)regAddr;
            UART_printf("Addr(0x%08X) : Value (0x%08X)\r\n", regAddr, val);
        }
        /* Read Meta Header Start and get the Number of Input RPRC Files */
        fp_readData(&mHdrStr, srcAddr, sizeof (meta_header_start_t));

And register values:

OSPI RCLK running at 166666666 MHz. 
Ospi Read speed for 0x4 bytes from offset 0x100000 = 0 Mbytes per sec
Searching for X509 certificate ...not found
Addr(0x47040000) : Value (0x81003889)
Addr(0x47040004) : Value (0x1d03339d)
Addr(0x47040008) : Value (0x00033082)
Addr(0x4704000c) : Value (0x0200000a)
Addr(0x47040010) : Value (0x00000129)
Addr(0x47040014) : Value (0x00121003)
Addr(0x47040018) : Value (0x0000003f)
Addr(0x4704001c) : Value (0x04000000)
Addr(0x47040020) : Value (0x00000000)
Addr(0x47040024) : Value (0x00000000)
Addr(0x47040028) : Value (0x00000000)
Addr(0x4704002c) : Value (0x00000000)
Addr(0x47040030) : Value (0x00000001)
Addr(0x47040034) : Value (0x00000001)
Addr(0x47040038) : Value (0x00014005)
Addr(0x4704003c) : Value (0xffffffff)
Addr(0x47040040) : Value (0x00000000)
Addr(0x47040044) : Value (0x0000307f)
Addr(0x47040048) : Value (0x00000000)
Addr(0x4704004c) : Value (0x00000000)
Addr(0x47040050) : Value (0x00000000)
Addr(0x47040054) : Value (0x00000000)
Addr(0x47040058) : Value (0x00000000)
Addr(0x4704005c) : Value (0x00000000)
Addr(0x47040060) : Value (0x00000000)
Addr(0x47040064) : Value (0x00000000)
Addr(0x47040068) : Value (0x00000000)
Addr(0x4704006c) : Value (0x00000000)
Addr(0x47040070) : Value (0x00000000)
Addr(0x47040074) : Value (0xffffffff)
Addr(0x47040078) : Value (0x00000000)
Addr(0x4704007c) : Value (0x00000000)
Addr(0x47040080) : Value (0x0000000f)
Addr(0x47040084) : Value (0x00000000)
Addr(0x47040088) : Value (0x00000000)
Addr(0x4704008c) : Value (0x00000000)
Addr(0x47040090) : Value (0x9fb20400)
Addr(0x47040094) : Value (0x00000001)
Addr(0x47040098) : Value (0x00000000)
Addr(0x4704009c) : Value (0x00000000)
Addr(0x470400a0) : Value (0x101a5b2c)
Addr(0x470400a4) : Value (0x00000000)
Addr(0x470400a8) : Value (0x0000001e)
Addr(0x470400ac) : Value (0x00000000)
Addr(0x470400b0) : Value (0x00000000)
Addr(0x470400b4) : Value (0x00300028)
Addr(0x470400b8) : Value (0x01000010)
Addr(0x470400bc) : Value (0xa952d785)
Addr(0x470400c0) : Value (0x0020001b)
Addr(0x470400c4) : Value (0x00000000)
Addr(0x470400c8) : Value (0x00000000)
Addr(0x470400cc) : Value (0x00000000)
Addr(0x470400d0) : Value (0x00000000)
Addr(0x470400d4) : Value (0x00000000)
Addr(0x470400d8) : Value (0x00000000)
Addr(0x470400dc) : Value (0x00000000)
Addr(0x470400e0) : Value (0x13edfa00)
Addr(0x470400e4) : Value (0x06f90000)
Addr(0x470400e8) : Value (0x00000000)
Addr(0x470400ec) : Value (0x00000000)
Addr(0x470400f0) : Value (0x00000000)
Addr(0x470400f4) : Value (0x00000000)
Addr(0x470400f8) : Value (0x00000000)
Addr(0x470400fc) : Value (0x03000300)
Ospi Read speed for 0x10 bytes from offset 0x100000 = 0 Mbytes per sec
Invalid magic number in Single image header
SBL_ospiClose called

Regards,

Milena

0 Milena Milosevic 6 months ago in reply to Milena Milosevic

Expert 1115 points

Hello Tanmay,

Any update regarding this?

Regards,

Milena

+1 Tanmay Patil 6 months ago in reply to Milena Milosevic

TI__Mastermind 38990 points

Hi Milena,

Sorry for the delay. Can you confirm that the last partition of the flash has the phy patterns flashed.

I see that the Controller is in phy mode, so it would use the phy patterns to get the delay.

You can get the binary for pattern from here : https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacinto7/10_01_00_04/exports/docs/linux/Foundational_Components/U-Boot/UG-QSPI.html#:~:text=loadaddr%200x6C0000%20%24filesize-,PHY%20Calibration,-PHY%20calibration%20allows

By default, it is added at offset "0x3fe0000" in the flash.

Regards,
Tanmay

0 Milena Milosevic 6 months ago in reply to Tanmay Patil

Expert 1115 points

Hi Tanmay,

We did not have flashed phy_pattern.

With this seems as SBL boot fine, but logs are not visible from the apps.

Do you have any idea why logs are not visible?

Same apps are working fine when loaded via UART or JTAG. We have tested for e.g. csl_uart_test_app,and other csl example apps, which are executed on the MCU1_0 core, and perform prints on the MCU UART.

SBL Revision: 01.00.10.01 (Feb 24 2025 - 14:16:41)
TIFS  ver: 10.0.8--v10.00.08 (Fiery Fox)
SCISERVER Board Configuration header population... SBL Revision: 01.00.10.01 (Feb 24 2025 - 14:16:41)
TIFS  ver: 10.0.8--v10.00.08 (Fiery Fox)
SCISERVER Board Configuration header population... PASSED
Sciclient_setBoardConfigHeader... PASSED
Setting GTC clock parent frequency.... 
Setting GTC clock parent frequency....done 
Initlialzing PLLs ...done.
InitlialzingClocks ...done.
Initlialzing DDR ...done.
Initializing GTC ...Copying EEPROM content to DDR ... 

 Failed to copy EEPROM Data !! 
EEPROM Data Copy Done.
Booting HSM core ... 
OSPI RCLK running at 200000000 MHz. 

 HSM Binary is not present.. 

 Continuing with normal boot.. 
Failed to boot HSM core !! 
Begin parsing user application
Calling Sciclient_procBootRequestProcessor, ProcId 0x20... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x21... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x22... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x23... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x24... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x25... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x26... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x27... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x1... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x2... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x6... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x7... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x8... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x9... 
Calling Sciclient_procBootRequestProcessor, ProcId 0xa... 
Calling Sciclient_procBootRequestProcessor, ProcId 0xb... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x30... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x31... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x32... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x33... 
Calling Sciclient_procBootRequestProcessor, ProcId 0x80... 
OSPI RCLK running at 166666666 MHz. 
Ospi Read speed for 0x4 bytes from offset 0x100000 = 0 Mbytes per sec
Searching for X509 certificate ...not found
Addr(0x47040000) : Value (0x83003889)
Addr(0x47040004) : Value (0x1d03339d)
Addr(0x47040008) : Value (0x00033082)
Addr(0x4704000c) : Value (0x0200000a)
Addr(0x47040010) : Value (0x00000125)
Addr(0x47040014) : Value (0x00121003)
Addr(0x47040018) : Value (0x0000003f)
Addr(0x4704001c) : Value (0x04000000)
Addr(0x47040020) : Value (0x00000000)
Addr(0x47040024) : Value (0x00000000)
Addr(0x47040028) : Value (0x00000000)
Addr(0x4704002c) : Value (0x00000000)
Addr(0x47040030) : Value (0x00000001)
Addr(0x47040034) : Value (0x00000001)
Addr(0x47040038) : Value (0x00014005)
Addr(0x4704003c) : Value (0xffffffff)
Addr(0x47040040) : Value (0x00000000)
Addr(0x47040044) : Value (0x0000307f)
Addr(0x47040048) : Value (0x00000000)
Addr(0x4704004c) : Value (0x00000000)
Addr(0x47040050) : Value (0x00000000)
Addr(0x47040054) : Value (0x00000000)
Addr(0x47040058) : Value (0x00000000)
Addr(0x4704005c) : Value (0x00000000)
Addr(0x47040060) : Value (0x00000000)
Addr(0x47040064) : Value (0x00000000)
Addr(0x47040068) : Value (0x00000000)
Addr(0x4704006c) : Value (0x00000000)
Addr(0x47040070) : Value (0x00000000)
Addr(0x47040074) : Value (0xffffffff)
Addr(0x47040078) : Value (0x00000000)
Addr(0x4704007c) : Value (0x00000000)
Addr(0x47040080) : Value (0x0000000f)
Addr(0x47040084) : Value (0x00000000)
Addr(0x47040088) : Value (0x00000000)
Addr(0x4704008c) : Value (0x00000000)
Addr(0x47040090) : Value (0x9fb20400)
Addr(0x47040094) : Value (0x00000001)
Addr(0x47040098) : Value (0x00000000)
Addr(0x4704009c) : Value (0x00000000)
Addr(0x470400a0) : Value (0x101a5b2c)
Addr(0x470400a4) : Value (0x00000000)
Addr(0x470400a8) : Value (0x0000001e)
Addr(0x470400ac) : Value (0x00000000)
Addr(0x470400b0) : Value (0x00000000)
Addr(0x470400b4) : Value (0x006f0055)
Addr(0x470400b8) : Value (0x01000010)
Addr(0x470400bc) : Value (0x2952d745)
Addr(0x470400c0) : Value (0x004b003a)
Addr(0x470400c4) : Value (0x00000000)
Addr(0x470400c8) : Value (0x00000000)
Addr(0x470400cc) : Value (0x00000000)
Addr(0x470400d0) : Value (0x00000000)
Addr(0x470400d4) : Value (0x00000000)
Addr(0x470400d8) : Value (0x00000000)
Addr(0x470400dc) : Value (0x00000000)
Addr(0x470400e0) : Value (0x13edfa00)
Addr(0x470400e4) : Value (0x06f90000)
Addr(0x470400e8) : Value (0x00000000)
Addr(0x470400ec) : Value (0x00000000)
Addr(0x470400f0) : Value (0x00000000)
Addr(0x470400f4) : Value (0x00000000)
Addr(0x470400f8) : Value (0x00000000)
Addr(0x470400fc) : Value (0x03000300)
Ospi Read speed for 0x10 bytes from offset 0x100000 = 0 Mbytes per sec
Ospi Read speed for 0x8 bytes from offset 0x100010 = 0 Mbytes per sec
Ospi Read speed for 0x8 bytes from offset 0x100018 = 0 Mbytes per sec
Ospi Read speed for 0x14 bytes from offset 0x100020 = 0 Mbytes per sec
Switching core id 8, proc_id 0x1 to split mode... 
Calling Sciclient_procBootGetProcessorState, ProcId 0x1... 
Sciclient_procBootSetProcessorCfg, ProcId 0x1, enabling split mode...
Calling Sciclient_procBootGetProcessorState, ProcId 0x1... 
Enabling MCU TCMs after reset for core 8
Disabling HW-based memory init of MCU TCMs for core 8
Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
Ospi Read speed for 0x14 bytes from offset 0x100034 = 0 Mbytes per sec
Copying 0x40 bytes to 0x41ce3000
Ospi Read speed for 0x40 bytes from offset 0x100048 = 1 Mbytes per sec
Ospi Read speed for 0x14 bytes from offset 0x100088 = 0 Mbytes per sec
Copying 0x368 bytes to 0x70020000
Ospi Read speed for 0x368 bytes from offset 0x10009c = 16 Mbytes per sec
Ospi Read speed for 0x14 bytes from offset 0x100404 = 0 Mbytes per sec
Copying 0x318 bytes to 0x70020368
Ospi Read speed for 0x318 bytes from offset 0x100418 = 15 Mbytes per sec
Ospi Read speed for 0x14 bytes from offset 0x100730 = 0 Mbytes per sec
Copying 0x118 bytes to 0x70020680
Ospi Read speed for 0x118 bytes from offset 0x100744 = 6 Mbytes per sec
Ospi Read speed for 0x14 bytes from offset 0x10085c = 0 Mbytes per sec
Copying 0x13c00 bytes to 0x80000000
Ospi Read speed for 0x13c00 bytes from offset 0x100870 = 99 Mbytes per sec
Ospi Read speed for 0x14 bytes from offset 0x114470 = 0 Mbytes per sec
Copying 0x9e38 bytes to 0x8001e500
Ospi Read speed for 0x9e38 bytes from offset 0x114484 = 77 Mbytes per sec
Ospi Read speed for 0x14 bytes from offset 0x11e2bc = 0 Mbytes per sec
Copying 0x53b0 bytes to 0x8002dd48
Ospi Read speed for 0x53b0 bytes from offset 0x11e2d0 = 65 Mbytes per sec
Ospi Read speed for 0x14 bytes from offset 0x123680 = 0 Mbytes per sec
Copying 0x1604 bytes to 0x80036900
Ospi Read speed for 0x1604 bytes from offset 0x123694 = 41 Mbytes per sec
Ospi Read speed for 0x14 bytes from offset 0x124c98 = 0 Mbytes per sec
Copying 0x2458 bytes to 0x80037f08
Ospi Read speed for 0x2458 bytes from offset 0x124cac = 33 Mbytes per sec
Setting entry point for core 8 @0x41ce3000
SBL_ospiClose called
Sciclient_procBootReleaseProcessor, ProcId 0x20...
Sciclient_procBootReleaseProcessor, ProcId 0x21...
Sciclient_procBootReleaseProcessor, ProcId 0x22...
Sciclient_procBootReleaseProcessor, ProcId 0x23...
Sciclient_procBootReleaseProcessor, ProcId 0x24...
Sciclient_procBootReleaseProcessor, ProcId 0x25...
Sciclient_procBootReleaseProcessor, ProcId 0x26...
Sciclient_procBootReleaseProcessor, ProcId 0x27...
Sciclient_procBootReleaseProcessor, ProcId 0x1...
Sciclient_procBootReleaseProcessor, ProcId 0x2...
Sciclient_procBootReleaseProcessor, ProcId 0x6...
Sciclient_procBootReleaseProcessor, ProcId 0x7...
Sciclient_procBootReleaseProcessor, ProcId 0x8...
Sciclient_procBootReleaseProcessor, ProcId 0x9...
Sciclient_procBootReleaseProcessor, ProcId 0xa...
Sciclient_procBootReleaseProcessor, ProcId 0xb...
Sciclient_procBootReleaseProcessor, ProcId 0x30...
Sciclient_procBootReleaseProcessor, ProcId 0x31...
Sciclient_procBootReleaseProcessor, ProcId 0x32...
Sciclient_procBootReleaseProcessor, ProcId 0x33...
Sciclient_procBootReleaseProcessor, ProcId 0x80...
Calling Sciclient_procBootRequestProcessor, ProcId 0x1... 
Sciclient_procBootSetProcessorCfg, ProcId 0x1, EntryPoint 0x41ce3000...
Sciclient_pmSetModuleClkFreq, DevId 0x15a @ 1000000000Hz... 
Copying first 128 bytes from app to MCU ATCM @ 0x0 for core 8
Calling Sciclient_procBootRequestProcessor, ProcId 0x2... 
Skipping Sciclient_procBootSetProcessorCfg for ProcId 0x2, EntryPoint 0xfffffffe...
MCU @ 1000000000Hz.
cycles per usec  = 1000
  fxn:main                            	line:3044833	cycle:    594650	timestamp:       594us
  fxn:main                            	line: 262	cycle:    594757	timestamp:       594us
  fxn:main                            	line: 297	cycle:    618563	timestamp:       618us
  fxn:main                            	line: 299	cycle:  52074901	timestamp:     52074us
  fxn:SBL_SciClientInit               	line: 395	cycle:  52087043	timestamp:     52087us
  fxn:SBL_SciClientInit               	line: 409	cycle:  52118505	timestamp:     52118us
  fxn:SBL_SciClientInit               	line: 424	cycle:  58702185	timestamp:     58702us
  fxn:SBL_SciClientInit               	line: 441	cycle:  61853749	timestamp:     61853us
  fxn:SBL_SciClientInit               	line: 447	cycle:  69554020	timestamp:     69554us
**fxn:SBL_SciclientBoardCfgPm         	line: 253	cycle:        50	timestamp:         0us
  fxn:SBL_SciClientInit               	line: 453	cycle:   1150275	timestamp:      1150us
  fxn:SBL_SciClientInit               	line: 461	cycle:   2476880	timestamp:      2476us
  fxn:SBL_getSysfwVersion             	line: 366	cycle:   3828995	timestamp:      3828us
  fxn:SBL_getSysfwVersion             	line: 368	cycle:  45887095	timestamp:     45887us
  fxn:main                            	line: 348	cycle: 149543840	timestamp:    149543us
  fxn:main                            	line: 396	cycle: 236770353	timestamp:    236770us
  fxn:main                            	line: 422	cycle: 286915926	timestamp:    286915us
  fxn:main                            	line: 432	cycle: 296059939	timestamp:    296059us
  fxn:main                            	line: 444	cycle: 341935547	timestamp:    341935us
  fxn:main                            	line: 468	cycle: 371328976	timestamp:    371328us
  fxn:main                            	line: 479	cycle: 469514333	timestamp:    469514us
  fxn:SBL_OSPIBootImage               	line: 659	cycle:1942990581	timestamp:   1942990us
  fxn:SBL_OSPIBootImage               	line: 671	cycle:1982267605	timestamp:   1982267us
  fxn:SBL_VerifyMulticoreImage        	line: 348	cycle:2056913699	timestamp:   2056913us
  fxn:SBL_VerifyMulticoreImage        	line: 448	cycle:2103978116	timestamp:   2103978us
  fxn:main                            	line: 520	cycle:-349431611	timestamp:   3945535us
  fxn:main                            	line: 551	cycle:-349431428	timestamp:   3945535us
Calling Sciclient_procBootRequestProcessor, ProcId 0x1...

Regards,

Milena

0 Tanmay Patil 6 months ago in reply to Milena Milosevic

TI__Mastermind 38990 points

Hi Milena,

Great to hear that SBL is working after this.

Milena Milosevic said:
With this seems as SBL boot fine, but logs are not visible from the apps.

Do you have any idea why logs are not visible?

I am not sure why this would happen. Can you raise another ticket for this. This would get assigned to a different expert who can help you with this. It would be helpful to mention which apps you have seen this with and if any changes are made to the apps source code.

Regards,
Tanmay

0 Milena Milosevic 6 months ago in reply to Tanmay Patil

Expert 1115 points

Hi Tanmay,

Basically we have not changed the apps.

We tested multiple apps, which are working fine, when booted via other boot mode..

Will open new ticket.

Regards,

Milena

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PROCESSOR-SDK-J784S4: Enable Micron OSPI flash in PSDK RTOS J784S4