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AM625: OLDI LVDS drive strengths (TXDRV[19..16] bit definitions)

Part Number: AM625


Tool/software:

Hello,

I’ve been looking at TI AM62x documentation regarding LVDS drive strength. Currently, we are investigating radiated emissions of our design and have identified LVDS as a problem. It would be great if we could conduct experiments with different LVDS drive strengths. So far this is what I know:

1) technical reference manual (spruiv7b.pdf, starting page 4490)

     - describes registers controlling LVDS DAT0, DAT1, DAT2, DAT3, and CLK, IO functionality

     - bits TXDRV[19..16] seem to control drive strength, but I could not find bit definitions for different drive strengths

     - bits RTERM_EN[0] seems to control if LVDS pin is differential terminated with 100Ohm

2) datasheet (am625.pdf, page 200)

     - describes OLDI switching characteristics for Fast or Slow modes

     - Fast mode uses TXDRV[19..16]=1000b (rise/fall time 0.25ns) and RTERM_EN=1b (pin termination) or RTERM_EN=0b (no pin termination)

     - Slow mode uses TXDRV[19..16]=0100b (rise/fall time 0.5ns) and RTERM_EN=0b (no pin termination)

From 2) I can configure drive strength for Fast and Slow modes with switching characteristics defined in the datasheet, but since TXDRV has 4-bits of encoding, are there other undocumented drive modes that might be useful to me?

Robert Susnik

Robert.Susnik@mvebio.com