PROCESSOR-SDK-J784S4: How to control the volume using amixer command

Ajins S

Intellectual 565 points

Part Number: PROCESSOR-SDK-J784S4

Tool/software:

Hi Team,

We are trying to use audio for our custom board. we are using dummy codec.

Both aplay and arecord are working fine for us.

root@j784s4-evm:~# aplay -Dplughw:0,0 c304-2.wav
Playing WAVE 'c304-2.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
^CAborted by signal Interrupt...
root@j784s4-evm:~# arecord -Dplughw:0,0 -c 2 -r 48000 -f S16_LE test.wav
Recording WAVE 'test.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
^CAborted by signal Interrupt...
root@j784s4-evm:~#

But when we try to use amixer command to set the volume, we are getting below error.

root@j784s4-evm:~# amixer -Dplughw:0,0 sset J784S4-TEST 50%
ALSA lib /usr/src/debug/alsa-lib/1.2.11/src/control/control.c:1570:(snd_ctl_open_noupdate) Invalid CTL plughw:0,0
amixer: Mixer attach plughw:0,0 error: No such file or directory

How to use amixer command to set volume

root@j784s4-evm:~# aplay -l
**** List of PLAYBACK Hardware Devices ****
card 0: J784S4TEST [J784S4-TEST], device 0: 2b00000.mcasp-snd-soc-dummy-dai snd-soc-dummy-dai-0 [2b00000.mcasp-snd-soc-dummy-dai snd-soc-dummy-dai-0]
  Subdevices: 1/1
  Subdevice #0: subdevice #0
card 1: J784S4TEST_1 [J784S4-TEST], device 0: 2b10000.mcasp-snd-soc-dummy-dai snd-soc-dummy-dai-0 [2b10000.mcasp-snd-soc-dummy-dai snd-soc-dummy-dai-0]
  Subdevices: 1/1
  Subdevice #0: subdevice #0
card 2: J784S4TEST_2 [J784S4-TEST], device 0: 2b30000.mcasp-snd-soc-dummy-dai snd-soc-dummy-dai-0 [2b30000.mcasp-snd-soc-dummy-dai snd-soc-dummy-dai-0]
  Subdevices: 1/1
  Subdevice #0: subdevice #0

Regards

Ajins

8 months ago

0 Jared McArthur 8 months ago

TI__Mastermind 19900 points

Hi Ajins,

You're referencing the wrong device name with amixer. You should either reference the card, or the device as `hw:N` where N is the specified card number (amixer man page).

You can set the volume to 70% with either of the following two commands:

$ amixer -c0 sset 'codec-1 DAC1' 70%
$ amixer -Dhw:0 sset 'codec-1 DAC1' 70%

You can view the controllable settings with the following command:

$ amixer -c0

Tested with:

$ aplay -Dplughw:0,0 /dev/random

Best,
Jared

0 Ajins S 8 months ago in reply to Jared McArthur

Intellectual 565 points

Hi Jared,

amixer -c0 is not listing anything.

We are using dummy codec. How to find out controls for that?

Regards

Ajins

0 Jared McArthur 8 months ago in reply to Ajins S

TI__Mastermind 19900 points

Hi Ajins,

Can you send your device tree?

Best,
Jared

0 Ajins S 8 months ago in reply to Jared McArthur

Intellectual 565 points

Hi Jared,

Please find the device tree.

// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
 *
 * EVM Board Schematics: https://www.ti.com/lit/zip/sprr458
 */

/dts-v1/;

#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/gpio/gpio.h>
#include "k3-j784s4.dtsi"

/ {
	compatible = "ti,j784s4-evm", "ti,j784s4";
	model = "CAT-DC CV Board";

	chosen {
		stdout-path = "serial5:115200n8";
	};

	aliases {
		serial0 = &main_uart3;	/* RS485 based 5Pin UART */
		serial1 = &main_uart4;	/* RS232 Based 5Pin UART */
		serial2 = &main_uart5;	/* RS232 Based 3Pin UART */
		serial3 = &main_uart7;	/* RS232 Based 3Pin UART */
		serial5 = &wkup_uart0;	/* 3Pin Debug UART */
		i2c0 = &main_i2c0;	/* Connected with MAX96789 - 0x40 Serializer */
		i2c1 = &main_i2c2;	/* Connected with A2B transiver - 0x68 and 0x69 */
		i2c2 = &main_i2c3;	/* Connected with MAX96745 - 0x42 Serializer */
		i2c3 = &wkup_i2c0;	/* PMIC's and Voltage Monitor Chip - 0x48, 0x40, 0x43, 0x30 */
		i2c4 = &mcu_i2c0;	/* RTC Chip - 0x53 */
		i2c5 = &mcu_i2c1;	/* Connected to TCAL9539 Based GPIO Expanders - 0x74 and 0x77 */
	};

	memory@80000000 {
		device_type = "memory";
		/* 16G RAM */
		reg = <0x00 0x80000000 0x00 0x80000000>,
		      <0x08 0x80000000 0x03 0x80000000>;
	};

	reserved_memory: reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		 /* global cma region */
		linux,cma {
			compatible = "shared-dma-pool";
			reusable;
			size = <0x00 0x38000000>; //16GB CMA
			linux,cma-default;
		};

		secure_ddr: optee@9e800000 {
			reg = <0x00 0x9e800000 0x00 0x01800000>;
			no-map;
		};

		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa0000000 0x00 0x100000>;
			no-map;
		};

		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa0100000 0x00 0xf00000>;
			no-map;
		};

		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa1000000 0x00 0x100000>;
			no-map;
		};

		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa1100000 0x00 0xf00000>;
			no-map;
		};

		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa2000000 0x00 0x100000>;
			no-map;
		};

		main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa2100000 0x00 0xf00000>;
			no-map;
		};

		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa3000000 0x00 0x100000>;
			no-map;
		};

		main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa3100000 0x00 0xf00000>;
			no-map;
		};

		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa4000000 0x00 0x100000>;
			no-map;
		};

		main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa4100000 0x00 0xf00000>;
			no-map;
		};

		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa5000000 0x00 0x100000>;
			no-map;
		};

		main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa5100000 0x00 0xf00000>;
			no-map;
		};

		main_r5fss2_core0_dma_memory_region: r5f-dma-memory@a6000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa6000000 0x00 0x100000>;
			no-map;
		};

		main_r5fss2_core0_memory_region: r5f-memory@a6100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa6100000 0x00 0xf00000>;
			no-map;
		};

		main_r5fss2_core1_dma_memory_region: r5f-dma-memory@a7000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa7000000 0x00 0x100000>;
			no-map;
		};

		main_r5fss2_core1_memory_region: r5f-memory@a7100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa7100000 0x00 0xf00000>;
			no-map;
		};

		c71_0_dma_memory_region: c71-dma-memory@a8000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa8000000 0x00 0x100000>;
			no-map;
		};

		c71_0_memory_region: c71-memory@a8100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa8100000 0x00 0xf00000>;
			no-map;
		};

		c71_1_dma_memory_region: c71-dma-memory@a9000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa9000000 0x00 0x100000>;
			no-map;
		};

		c71_1_memory_region: c71-memory@a9100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa9100000 0x00 0xf00000>;
			no-map;
		};

		c71_2_dma_memory_region: c71-dma-memory@aa000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xaa000000 0x00 0x100000>;
			no-map;
		};

		c71_2_memory_region: c71-memory@aa100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xaa100000 0x00 0xf00000>;
			no-map;
		};

		c71_3_dma_memory_region: c71-dma-memory@ab000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xab000000 0x00 0x100000>;
			no-map;
		};

		c71_3_memory_region: c71-memory@ab100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xab100000 0x00 0xf00000>;
			no-map;
		};
	};

	evm_12v0: regulator-evm12v0 {
		/* main supply */
		compatible = "regulator-fixed";
		regulator-name = "evm_12v0";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		regulator-boot-on;
	};

	vsys_3v3: regulator-vsys3v3 {
		/* Output of LM5140 */
		compatible = "regulator-fixed";
		regulator-name = "vsys_3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&evm_12v0>;
		regulator-always-on;
		regulator-boot-on;
	};

	vsys_5v0: regulator-vsys5v0 {
		/* Output of LM5140 */
		compatible = "regulator-fixed";
		regulator-name = "vsys_5v0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&evm_12v0>;
		regulator-always-on;
		regulator-boot-on;
	};

	/* This node need to be removed while adding entry for display */
	dp0_pwr_3v3: regulator-dp0-prw {
		compatible = "regulator-fixed";
		regulator-name = "dp0-pwr";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
//		gpio = <&exp4 0 GPIO_ACTIVE_HIGH>;
//		enable-active-high;
	};

	dp0: dp0-connector {
		compatible = "dp-connector";
		label = "DP0";
		type = "full-size";
		//dp-pwr-supply = <&dp0_pwr_3v3>;

		port {
			dp0_connector_in: endpoint {
				remote-endpoint = <&dp0_out>;
			};
		};
	};

	vsys_io_1v8: regulator-vsys-io-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "vsys_io_1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
		regulator-boot-on;
	};

	vsys_io_1v2: regulator-vsys-io-1v2 {
		compatible = "regulator-fixed";
		regulator-name = "vsys_io_1v2";
		regulator-min-microvolt = <1200000>;
		regulator-max-microvolt = <1200000>;
		regulator-always-on;
		regulator-boot-on;
	};

	edp1_refclk: clock-edp1-refclk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <19200000>;
	};

	/* This node need to be removed while doing clean up for display */
	dp1_pwr_3v3: regulator-dp1-prw {
		compatible = "regulator-fixed";
		regulator-name = "dp1-pwr";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
//		gpio = <&exp4 1 GPIO_ACTIVE_HIGH>; /* P1 - DP1_PWR_SW_EN */
//		enable-active-high;
//		regulator-always-on;
	};

	transceiver1: can-phy0 {
		compatible = "ti,tcan1043";
		#phy-cells = <0>;
		max-bitrate = <5000000>;
//		standby-gpios = <&exp1 7 GPIO_ACTIVE_HIGH>;
//		enable-gpios = <&exp1 5 GPIO_ACTIVE_HIGH>;
	};

	dsi0_display_panel: panel {
		reg = <0>;
		compatible = "max96789-simple-panel0";
		label = "dsi-gmsl";
		power-supply = <&vsys_3v3>;
		/* reg = <0x42>;*/
		/* The color signals mapping order */
		data-mapping = "rgb888-1x24";		/* bus format MEDIA_BUS_FMT_RGB888_1X24 */

		width-mm = <293>;
		height-mm = <165>;

		port {
			max96789_in_0: endpoint {
				remote-endpoint = <&panel0_bridge_out>;
			};
		};
	};

	dsi1_display_panel: panel {
		reg = <0>;
		compatible = "max96789-simple-panel1";
		label = "dsi-gmsl";
		power-supply = <&vsys_3v3>;
		/* reg = <0x42>;*/
		/* The color signals mapping order */
		data-mapping = "rgb888-1x24";		/* bus format MEDIA_BUS_FMT_RGB888_1X24 */

		width-mm = <293>;
		height-mm = <165>;

		port {
			max96789_in_1: endpoint {
				remote-endpoint = <&panel1_bridge_out>;
			};
		};
	};

	codec_test: codec_test {
		compatible = "linux,snd-soc-dummy";
		#sound-dai-cells = <0>;
		status="okay";
	};

	codec_audio0: sound0 {
		compatible = "simple-audio-card";
		simple-audio-card,name = "J784S4-TEST";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&sound_master0>;
		simple-audio-card,frame-master = <&sound_master0>;

		sound_master0: simple-audio-card,cpu {
		sound-dai = <&mcasp0>;
		system-clock-direction-out;
		};

		simple-audio-card,codec {
			sound-dai = <&codec_test>;
		};
	};


	codec_audio1: sound1 {
		compatible = "simple-audio-card";
		simple-audio-card,name = "J784S4-TEST";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&sound_master1>;
		simple-audio-card,frame-master = <&sound_master1>;

		sound_master1: simple-audio-card,cpu {
		sound-dai = <&mcasp1>;
		system-clock-direction-out;
		};

		simple-audio-card,codec {
			sound-dai = <&codec_test>;
		};
	};


	codec_audio3: sound3 {
		compatible = "simple-audio-card";
		simple-audio-card,name = "J784S4-TEST";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&sound_master3>;
		simple-audio-card,frame-master = <&sound_master3>;

		sound_master3: simple-audio-card,cpu {
		sound-dai = <&mcasp3>;
		system-clock-direction-out;
		};

		simple-audio-card,codec {
			sound-dai = <&codec_test>;
		};
	};

};

&wkup_pmx0 {
	bootph-all;
	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
		bootph-all;
		pinctrl-single,pins = <
			J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */
			J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */
			J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B33) MCU_OSPI0_D0 */
			J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B32) MCU_OSPI0_D1 */
			J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (C33) MCU_OSPI0_D2 */
			J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (C35) MCU_OSPI0_D3 */
			J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D33) MCU_OSPI0_D4 */
			J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D34) MCU_OSPI0_D5 */
			J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (E34) MCU_OSPI0_D6 */
			J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (E33) MCU_OSPI0_D7 */
			J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */
		>;
	};

	wkup_gpio_mcu1_pins_default_pmux0: wkup-gpio-mcu1-pins-default-pmux0 {
		pinctrl-single,pins = <
			// Sync Input from BCM
			J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 7) /* (D32) MCU_OSPI0_LBCLKO.WKUP_GPIO0_17 */
			// PMIC IRQ
			J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 7) /* (A33) MCU_OSPI0_CSn1.WKUP_GPIO0_28 */
		>;
	};

};

&wkup_pmx1 {
	bootph-all;
	wkup_gpio_mcu1_pins_default_pmux1: wkup-gpio-mcu1-pins-default-pmux1 {
		pinctrl-single,pins = <
			// BCM Reset In
			J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 7) /* (C32) MCU_OSPI0_CSn3.WKUP_GPIO0_30 */
			// SCORPIO IRQ In
			J784S4_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (B34) MCU_OSPI0_CSn2.WKUP_GPIO0_29 */
			// SCORPIO Sync Out
			J784S4_WKUP_IOPAD(0x014, PIN_OUTPUT, 7) /* (E35) MCU_OSPI1_D0.WKUP_GPIO0_34 */
			// EN_1V8_USB_VBUS
			J784S4_WKUP_IOPAD(0x028, PIN_OUTPUT, 7) /* (G33) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */
			// HSD Status
			J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 7) /* (G32) MCU_OSPI1_CSn0.WKUP_GPIO0_38 */
			// EN_1V8_A2B_PHANTOM
			J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 7) /* (D31) MCU_OSPI1_D1.WKUP_GPIO0_35 */
			// EN 1V8 HSD
			J784S4_WKUP_IOPAD(0x01c, PIN_OUTPUT, 7) /* (G31) MCU_OSPI1_D2.WKUP_GPIO0_36 */
			// Reset SCORPIO
			J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 7) /* (F32) MCU_OSPI1_CLK.WKUP_GPIO0_31 */
			// SCORPIO IRQ
			J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 7) /* (F33) MCU_OSPI1_D3.WKUP_GPIO0_37 */
			// Watchdog trigger
			J784S4_WKUP_IOPAD(0x010, PIN_OUTPUT, 7) /* (F31) MCU_OSPI1_DQS.WKUP_GPIO0_33 */
			// 3V3 Peripheral IRQ
			J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 7) /* (C31) MCU_OSPI1_LBCLKO.WKUP_GPIO0_32 */
		>;
	};
};

&wkup_pmx2 {
	bootph-all;
	status = "okay";

	mcu_adc0_pins_default: mcu-adc0-pins-default {
		pinctrl-single,pins = <
			J784S4_WKUP_IOPAD(0x0cc, PIN_INPUT, 0) /* (P36) MCU_ADC0_AIN0 */
			J784S4_WKUP_IOPAD(0x0d0, PIN_INPUT, 0) /* (V36) MCU_ADC0_AIN1 */
			J784S4_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (T34) MCU_ADC0_AIN2 */
			J784S4_WKUP_IOPAD(0x0d8, PIN_INPUT, 0) /* (T36) MCU_ADC0_AIN3 */
			J784S4_WKUP_IOPAD(0x0dc, PIN_INPUT, 0) /* (P34) MCU_ADC0_AIN4 */
			J784S4_WKUP_IOPAD(0x0e0, PIN_INPUT, 0) /* (R37) MCU_ADC0_AIN5 */
			J784S4_WKUP_IOPAD(0x0e4, PIN_INPUT, 0) /* (R33) MCU_ADC0_AIN6 */
			J784S4_WKUP_IOPAD(0x0e8, PIN_INPUT, 0) /* (V38) MCU_ADC0_AIN7 */
		>;
	};

	/* PMIC's and Voltage Monitor Chip */
	wkup_i2c0_pins_default: wkup-i2c0-pins-default {
		pinctrl-single,pins = <
			J784S4_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */
			J784S4_WKUP_IOPAD(0x09C, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */
		>;
	};

	/* RTC Chip */
	mcu_i2c0_pins_default: mcu-i2c0-default-pins {
		pinctrl-single,pins = <
			J784S4_WKUP_IOPAD(0x0a0, PIN_INPUT, 0) /* (M35) MCU_I2C0_SCL */
			J784S4_WKUP_IOPAD(0x0a4, PIN_INPUT, 0) /* (G34) MCU_I2C0_SDA */
		>;
	};

	/* Connected to TCAL9539 Based GPIO Expanders */
	mcu_i2c1_pins_default: mcu-i2c1-default-pins {
		pinctrl-single,pins = <
			J784S4_WKUP_IOPAD(0x078, PIN_INPUT, 0) /* (L35) WKUP_GPIO0_8.MCU_I2C1_SCL */
			J784S4_WKUP_IOPAD(0x07c, PIN_INPUT, 0) /* (L34) WKUP_GPIO0_9.MCU_I2C1_SDA */
		>;
	};

	/* 3Pin Debug UART */
	wkup_uart0_pins_default: wkup-uart0-pins-default {
		pinctrl-single,pins = <
			J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */
			J784S4_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (K34) WKUP_UART0_TXD */
		>;
	};

	/* SPI line to scorpio chip */
	mcu_spi0_pins_default: mcu_spi0-default-pins {
		pinctrl-single,pins = <
			J784S4_WKUP_IOPAD(0x038, PIN_OUTPUT, 0) /* (G38) MCU_SPI0_CLK */
			J784S4_WKUP_IOPAD(0x044, PIN_OUTPUT, 0) /* (F37) MCU_SPI0_CS0 */
			J784S4_WKUP_IOPAD(0x03c, PIN_OUTPUT, 0) /* (H36) MCU_SPI0_D0 */
			J784S4_WKUP_IOPAD(0x040, PIN_INPUT, 0) /* (J38) MCU_SPI0_D1 */
		>;
	};

	/* SPI line to HSD and LSD */
	mcu_spi1_pins_default: mcu_spi1-default-pins {
		pinctrl-single,pins = <
			J784S4_WKUP_IOPAD(0x058, PIN_OUTPUT, 0) /* (H38) WKUP_GPIO0_0.MCU_SPI1_CLK */
			J784S4_WKUP_IOPAD(0x064, PIN_OUTPUT, 0) /* (J36) WKUP_GPIO0_3.MCU_SPI1_CS0 */
			J784S4_WKUP_IOPAD(0x05c, PIN_OUTPUT, 0) /* (J34) WKUP_GPIO0_1.MCU_SPI1_D0 */
			J784S4_WKUP_IOPAD(0x060, PIN_INPUT, 0) /* (J35) WKUP_GPIO0_2.MCU_SPI1_D1 */
		>;
	};

	mcu_mcan0_pins_default: mcu-mcan0-default-pins {
		pinctrl-single,pins = <
			J784S4_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (F38) MCU_MCAN0_RX */
			J784S4_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (K33) MCU_MCAN0_TX */
		>;
	};

	wkup_gpio_mcu1_pins_default_pmux2: wkup-gpio-mcu1-pins-default-pmux2 {
		pinctrl-single,pins = <
			// RTC Clock In
			J784S4_WKUP_IOPAD(0x11c, PIN_INPUT, 7) /* (M34) WKUP_GPIO0_67 */
			// Test PIN
			J784S4_WKUP_IOPAD(0x080, PIN_OUTPUT, 7) /* (L33) WKUP_GPIO0_10 */
			// NOR Reset Out
			J784S4_WKUP_IOPAD(0x0b4, PIN_OUTPUT, 0) /* (F36) MCU_RESETSTATz */
			// Ser1 Touch D1
			J784S4_WKUP_IOPAD(0x06c, PIN_INPUT, 7) /* (K36) WKUP_GPIO0_5 */
			// Ser1 Touch D2
			J784S4_WKUP_IOPAD(0x070, PIN_INPUT, 7) /* (L37) WKUP_GPIO0_6 */
			// FSync clock to regulator
			J784S4_WKUP_IOPAD(0x084, PIN_OUTPUT, 7) /* (M38) WKUP_GPIO0_11 */
			// System Sleep Control
			J784S4_WKUP_IOPAD(0x074, PIN_OUTPUT, 7) /* (L36) WKUP_GPIO0_7 */
			// Short to GND 3
			J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 7) /* (E37) MCU_RGMII1_TD2.WKUP_GPIO0_43 */
			// Short to GND 2
			J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 7) /* (D38) MCU_RGMII1_TD1.WKUP_GPIO0_44 */
			// Short to GND 1
			J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 7) /* (D37) MCU_RGMII1_TD0.WKUP_GPIO0_45 */
			// STB1
			J784S4_WKUP_IOPAD(0x02c, PIN_INPUT, 7) /* (A35) MCU_RGMII1_RD0.WKUP_GPIO0_51 */
			// STB2
			J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7) /* (B36) MCU_RGMII1_RD1.WKUP_GPIO0_50 */
			// Control 12V Supply for Camera
			J784S4_WKUP_IOPAD(0x0b8, PIN_OUTPUT, 7) /* (M37) WKUP_GPIO0_56 */
			// Control 12V Supply Diagnostics
			J784S4_WKUP_IOPAD(0x114, PIN_OUTPUT, 7) /* (M36) WKUP_GPIO0_57 */
			// EN_P1V4_EFUSE
			J784S4_WKUP_IOPAD(0x068, PIN_OUTPUT, 7) /* (H35) WKUP_GPIO0_4 */
			// LSD_IN65
			J784S4_WKUP_IOPAD(0x088, PIN_OUTPUT, 7) /* (J37) WKUP_GPIO0_12 */
			// LSD_IN87
			J784S4_WKUP_IOPAD(0x08c, PIN_OUTPUT, 7) /* (K38) WKUP_GPIO0_13 */
			// LSD_IN21
			J784S4_WKUP_IOPAD(0x090, PIN_OUTPUT, 7) /* (H37) WKUP_GPIO0_14 */
			// LSD_IN43
			J784S4_WKUP_IOPAD(0x094, PIN_OUTPUT, 7) /* (K37) WKUP_GPIO0_15 */
			// PWRGD_P0V8
			J784S4_WKUP_IOPAD(0x0ec, PIN_INPUT, 7) /* (Y38) MCU_ADC1_AIN0.WKUP_GPIO0_79 */
			// PWRGD_P1V0
			J784S4_WKUP_IOPAD(0x0f0, PIN_INPUT, 7) /* (Y34) MCU_ADC1_AIN1.WKUP_GPIO0_80 */
			// PWRGD_P1V8
			J784S4_WKUP_IOPAD(0x0f4, PIN_INPUT, 7) /* (V34) MCU_ADC1_AIN2.WKUP_GPIO0_81 */
			// PWRGD_P5V0
			J784S4_WKUP_IOPAD(0x0f8, PIN_INPUT, 7) /* (W37) MCU_ADC1_AIN3.WKUP_GPIO0_82 */
			// PWRGD_P9V6
			J784S4_WKUP_IOPAD(0x0fc, PIN_INPUT, 7) /* (AA37) MCU_ADC1_AIN4.WKUP_GPIO0_83 */
			// PWRGD_P12V6
			J784S4_WKUP_IOPAD(0x100, PIN_INPUT, 7) /* (W33) MCU_ADC1_AIN5.WKUP_GPIO0_84 */
			// USB_VBUS Fault
			J784S4_WKUP_IOPAD(0x104, PIN_INPUT, 7) /* (U33) MCU_ADC1_AIN6.WKUP_GPIO0_85 */
			// P3V3 Ser Fault
			J784S4_WKUP_IOPAD(0x108, PIN_INPUT, 7) /* (Y36) MCU_ADC1_AIN7.WKUP_GPIO0_86 */
			// EN_P0V8
			J784S4_WKUP_IOPAD(0x034, PIN_OUTPUT, 7) /* (A36) MCU_MDIO0_MDC.WKUP_GPIO0_53 */
			// EN_P1V0
			J784S4_WKUP_IOPAD(0x024, PIN_OUTPUT, 7) /* (C36) MCU_RGMII1_RD2.WKUP_GPIO0_62 */
			// EN_P1V8
			J784S4_WKUP_IOPAD(0x020, PIN_OUTPUT, 7) /* (D36) MCU_RGMII1_RD3.WKUP_GPIO0_48 */
			// EN_P3V3_SER
			J784S4_WKUP_IOPAD(0x01c, PIN_OUTPUT, 7) /* (B37) MCU_RGMII1_RXC.WKUP_GPIO0_47 */
			// EN_P5V0
			J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 7) /* (E36) MCU_RGMII1_TXC.WKUP_GPIO0_46 */
		>;
	};
};

&wkup_pmx3 {
	wkup_gpio_mcu1_pins_default_pmux3: wkup-gpio-mcu1-pins-default-pmux3 {
		pinctrl-single,pins = <
			/* Wake-up PMIC */
			J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (M33) WKUP_GPIO0_49 */
		>;
	};
};

&wkup_gpio0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&wkup_gpio_mcu1_pins_default_pmux0 &wkup_gpio_mcu1_pins_default_pmux1 &wkup_gpio_mcu1_pins_default_pmux2 &wkup_gpio_mcu1_pins_default_pmux3>;
};

&wkup_gpio_intr {
	status = "okay";
};

&tscadc0 {
	pinctrl-0 = <&mcu_adc0_pins_default>;
	pinctrl-names = "default";
	status = "okay";
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

/* 3Pin Debug UART */
&wkup_uart0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&wkup_uart0_pins_default>;
};

/* SPI line to scorpio chip */
&mcu_spi0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_spi0_pins_default>;
	ti,spi-num-cs = <4>;
	ti,pindir-d0-out-d1-in;
        spidev@0{
                compatible = "rohm,dh2228fv";
                reg = <0>;
                spi-max-frequency = <10000000>;
        };
};

/* SPI line to HSD and LSD */
&mcu_spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_spi1_pins_default>;
	ti,spi-num-cs = <4>;
	ti,pindir-d0-out-d1-in;
	spidev@0{
                compatible = "rohm,dh2228fv";
                reg = <0>;
                spi-max-frequency = <10000000>;
        };
};

&wkup_i2c0 {
	bootph-all;
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&wkup_i2c0_pins_default>;
	clock-frequency = <400000>;

	tps659413: pmic@48 {
		compatible = "ti,tps6594-q1";
		reg = <0x48>;
		system-power-controller;
		pinctrl-names = "default";
//		pinctrl-0 = <&pmic_irq_pins_default>;
		interrupt-parent = <&wkup_gpio0>;
		interrupts = <39 IRQ_TYPE_EDGE_FALLING>;
		gpio-controller;
		#gpio-cells = <2>;
		ti,primary-pmic;
		buck12-supply = <&vsys_3v3>;
		buck3-supply = <&vsys_3v3>;
		buck4-supply = <&vsys_3v3>;
		buck5-supply = <&vsys_3v3>;
		ldo1-supply = <&vsys_3v3>;
		ldo2-supply = <&vsys_3v3>;
		ldo3-supply = <&vsys_3v3>;
		ldo4-supply = <&vsys_3v3>;

		regulators {
			bucka12: buck12 {
				regulator-name = "vdd_ddr_1v1";
				regulator-min-microvolt = <1100000>;
				regulator-max-microvolt = <1100000>;
				regulator-boot-on;
				regulator-always-on;
			};

			bucka3: buck3 {
				regulator-name = "vdd_ram_0v85";
				regulator-min-microvolt = <850000>;
				regulator-max-microvolt = <850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			bucka4: buck4 {
				regulator-name = "vdd_io_1v8";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			bucka5: buck5 {
				regulator-name = "vdd_mcu_0v85";
				regulator-min-microvolt = <850000>;
				regulator-max-microvolt = <850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldoa1: ldo1 {
				regulator-name = "vdd_mcuio_1v8";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldoa2: ldo2 {
				regulator-name = "vdd_mcuio_3v3";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldoa3: ldo3 {
				regulator-name = "vds_dll_0v8";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldoa4: ldo4 {
				regulator-name = "vda_mcu_1v8";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};
		};
	};
};


/* RTC Chip */
&mcu_i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_i2c0_pins_default>;
	clock-frequency = <400000>;
};

/* Connected to TCAL9539 Based GPIO Expanders */
&mcu_i2c1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_i2c1_pins_default>;
	clock-frequency = <400000>;
	
	exp1: gpio@74 {
		compatible = "ti,tca9539";
		reg = <0x74>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-line-names = "RSR_SER2_PWDN", "DI_SER2_LOCK", "IRQ_SER2_ERR",
                                  "RST_SER1_PWDN", "FM_LSD_IDLE", "CAN_MAIN1_EN",
				  "CAN_MAIN1_FLT", "CAN_MAIN1_STBY", "EN_RS485_TX",
				  "EN_HSD_DIAG", "FM_SCORPIO3_SWFDL",
				  "FM_SCORPIO3_GPIO7", "FM_SCORPIO3_GPIO4",
				  "DI_SER1_LOCK", "IRQ_SER1_LOCK", "EN_USB_VBUS_DIAG";

		p00-hog {
			/* RSR_SER2_PWDN */
			gpio-hog;
			gpios = <0 GPIO_ACTIVE_HIGH>;
			output-high;
		};

		p03-hog {
			/* RST_SER1_PWDN */
			gpio-hog;
			gpios = <3 GPIO_ACTIVE_HIGH>;
			output-high;
		};

		p04-hog {
			/* FM_LSD_IDLE */
			gpio-hog;
			gpios = <4 GPIO_ACTIVE_HIGH>;
			output-high;
		};

		p05-hog {
			/* CAN_MAIN1_EN */
			gpio-hog;
			gpios = <5 GPIO_ACTIVE_HIGH>;
			output-high;
		};

		p07-hog {
			/* CAN_MAIN1_STBY */
			gpio-hog;
			gpios = <7 GPIO_ACTIVE_HIGH>;
			output-high;
		};

		p10-hog {
			/* EN_RS485_TX */
			gpio-hog;
			gpios = <8 GPIO_ACTIVE_HIGH>;
			output-high;
		};

		p11-hog {
			/* EN_HSD_DIAG */
			gpio-hog;
			gpios = <9 GPIO_ACTIVE_HIGH>;
			output-high;
		};

		p12-hog {
			/* FM_SCORPIO3_SWFDL */
			gpio-hog;
			gpios = <10 GPIO_ACTIVE_HIGH>;
			output-low;
		};

		p13-hog {
			/* FM_SCORPIO3_GPIO7 */
			gpio-hog;
			gpios = <11 GPIO_ACTIVE_HIGH>;
			output-low;
		};

		p14-hog {
			/* FM_SCORPIO3_GPIO4 */
			gpio-hog;
			gpios = <12 GPIO_ACTIVE_HIGH>;
			output-high;
		};

		p17-hog {
			/* EN_USB_VBUS_DIAG */
			gpio-hog;
			gpios = <15 GPIO_ACTIVE_HIGH>;
			output-high;
		};

	};

	exp2: gpio@77 {
		compatible = "ti,tca9539";
		reg = <0x77>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-line-names = "WU_CAN_MAIN1", "WU_RS232_1_DCD", "WU_STG", "WU_STB",
                                  "WU_RTC", "WU_KEYSW", "WU_ETHSW", "WU_P3V3AON", "GND", "GND",
                                  "GND", "GND", "GND", "GND", "GND", "EN_WU_MASK";

		p17-hog {
			/* EN_WU_MASK */
			gpio-hog;
			gpios = <15 GPIO_ACTIVE_HIGH>;
			output-high;
		};

	};

};

&ufs_wrapper {
	status = "okay";
};

&fss {
	bootph-all;
	status = "okay";
};

&serdes0 { 
	status = "okay"; 
	serdes0_pcie_link1: phy@0 { 
		reg = <0>; 
		cdns,num-lanes = <1>; 
		#phy-cells = <0>; 
		cdns,phy-type = <PHY_TYPE_PCIE>; 
		resets = <&serdes_wiz0 1>; 
	}; 
	serdes0_pcie_link2: phy@2 { 
		reg = <2>; 
		cdns,num-lanes = <1>; 
		#phy-cells = <0>; 
		cdns,phy-type = <PHY_TYPE_PCIE>; 
		resets = <&serdes_wiz0 3>; 
	}; 
}; 

&serdes0 {
	status = "okay";

	serdes0_usb_link: phy@3 {
		reg = <3>;
		cdns,num-lanes = <1>;
		#phy-cells = <0>;
		cdns,phy-type = <PHY_TYPE_USB3>;
		resets = <&serdes_wiz0 4>;
	};
};

&serdes_wiz0 {
	status = "okay";
};

&usb_serdes_mux {
	idle-states = <0>; /* USB0 to SERDES lane 3 */
};

&usbss0 {
	status = "okay";
//	pinctrl-0 = <&main_usbss0_pins_default>;
//	pinctrl-names = "default";
	ti,vbus-divider;
	ti,usb2-only;
};

&usb0 {
	dr_mode = "host";
	maximum-speed = "high-speed";
	phys = <&serdes0_usb_link>;
	phy-names = "cdns3,usb3-phy";
	phy-names = "cdns3,usb2-phy";
};

&serdes1 {
	status = "okay";
	serdes1_pcie2_link: phy@2 {
		reg = <2>;
		cdns,num-lanes = <1>;
		#phy-cells = <0>;
		cdns,phy-type = <PHY_TYPE_PCIE>;
		resets = <&serdes_wiz1 3>;
	};
};

&serdes_wiz1 {
	status = "okay";
};

&pcie2_rc { 
	status = "okay"; 
	num-lanes = <1>; 
//	reset-gpios = <&wkup_gpio0 25 GPIO_ACTIVE_HIGH>; 
	phys = <&serdes1_pcie2_link>;
	ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x2>; 
	/delete-property/ clocks;
	/delete-property/ clock-names;
	clocks = <&k3_clks 334 0>, <&serdes1 CDNS_TORRENT_REFCLK_DRIVER>;
	clock-names = "fck", "pcie_refclk";
	phys = <&serdes1_pcie2_link>;
	phy-names = "pcie-phy"; 
};

&pcie1_rc {
	status="disabled";
	/delete-property/ ti,syscon-acspcie-proxy-ctrl;
	ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x3>;
};

&serdes_ln_ctrl { 
	idle-states = <J784S4_SERDES0_LANE0_PCIE1_LANE0>, <J784S4_SERDES0_LANE1_IP1_UNUSED>, 
<J784S4_SERDES0_LANE2_PCIE3_LANE0>, <J784S4_SERDES0_LANE3_USB>, 
<J784S4_SERDES1_LANE0_PCIE0_LANE0>, <J784S4_SERDES1_LANE1_PCIE0_LANE1>, 
<J784S4_SERDES1_LANE2_PCIE0_LANE2>, <J784S4_SERDES1_LANE3_PCIE0_LANE3>, 
<J784S4_SERDES2_LANE2_QSGMII_LANE1>, <J784S4_SERDES2_LANE3_QSGMII_LANE2>; 
};

&serdes_refclk {
	status = "okay";
	clock-frequency = <100000000>;
};

&ospi0 {
	bootph-all;
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;

	ospi0_nor: flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0x0>;
		spi-tx-bus-width = <8>;
		spi-rx-bus-width = <8>;
		spi-max-frequency = <20000000>;
		cdns,tshsl-ns = <10>;
		cdns,tsd2d-ns = <30>;
		cdns,tchsh-ns = <2>;
		cdns,tslch-ns = <2>;
		cdns,read-delay = <4>;
                cdns,phy-mode;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "ospi.tiboot3";
				reg = <0x0 0x80000>;
			};

			partition@80000 {
				label = "ospi.tispl";
				reg = <0x80000 0x200000>;
			};

			partition@280000 {
				label = "ospi.u-boot";
				reg = <0x280000 0x400000>;
			};

			partition@680000 {
				label = "ospi.env";
				reg = <0x680000 0x40000>;
			};

			partition@6c0000 {
				label = "ospi.env.backup";
				reg = <0x6c0000 0x40000>;
			};

			partition@800000 {
				label = "ospi.rootfs";
				reg = <0x800000 0x7c0000>;
			};

			partition@fc0000 {
				bootph-all;
				label = "ospi.phypattern";
				reg = <0xfc0000 0x40000>;
			};
			
			partition@1000000 {
				label = "ospi.full";
				reg = <0x0 0x1000000>;
 			};
		};
	};
};



&main_pmx0 {
	bootph-all;

	/* RS485 5pin UART */
	main_uart3_pins_default: main-uart3-default-pins {
		pinctrl-single,pins = <
			J784S4_IOPAD(0x074, PIN_INPUT, 11) /* (AC33) MCAN2_TX.UART3_RXD */
			J784S4_IOPAD(0x078, PIN_INPUT, 11) /* (AH37) MCAN2_RX.UART3_TXD */
		>;
	};

	/* RS232 Based 5Pin UART */
	main_uart4_pins_default: main-uart4-default-pins {
		pinctrl-single,pins = <
			J784S4_IOPAD(0x094, PIN_INPUT, 7) /* (AG35) MCASP0_AXR9.GPIO0_37 */	// Configured as GPIO
			J784S4_IOPAD(0x098, PIN_INPUT, 7) /* (AH36) MCASP0_AXR10.GPIO0_38 */	// Configured as GPIO
			J784S4_IOPAD(0x08c, PIN_INPUT, 11) /* (AE35) MCASP0_AXR7.UART4_RXD */
			J784S4_IOPAD(0x090, PIN_INPUT, 11) /* (AC35) MCASP0_AXR8.UART4_TXD */
		>;
	};

	/* RS232 Based 3Pin UART */
	main_uart5_pins_default: main-uart5-default-pins {
		pinctrl-single,pins = <
			J784S4_IOPAD(0x09c, PIN_INPUT, 11) /* (AF35) MCASP0_AXR11.UART5_RXD */
			J784S4_IOPAD(0x0a0, PIN_INPUT, 11) /* (AD34) MCASP0_AXR12.UART5_TXD */
		>;
	};

	/* RS232 Based 3Pin UART */
	main_uart7_pins_default: main-uart7-default-pins {
		pinctrl-single,pins = <
			J784S4_IOPAD(0x0a4, PIN_INPUT, 13) /* (AJ36) MCASP0_AXR13.UART7_RXD */
			J784S4_IOPAD(0x0a8, PIN_OUTPUT, 13) /* (AF34) MCASP0_AXR14.UART7_TXD */
		>;
	};

	/* Connected with MAX96789 Serializer */
	main_i2c0_pins_default: main-i2c0-pins-default {
		pinctrl-single,pins = <
			J784S4_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AN36) I2C0_SCL */
			J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */
		>;
	};

	/* Connected with A2B transiver */
	main_i2c2_pins_default: main-i2c2-default-pins {
		pinctrl-single,pins = <
			J784S4_IOPAD(0x04c, PIN_OUTPUT, 13) /* (AC32) MCASP1_AXR1.I2C2_SCL */
			J784S4_IOPAD(0x050, PIN_INPUT, 13) /* (AC37) MCASP1_AXR2.I2C2_SDA */
		>;
	};

	/* Connected with MAX96745 Serializer */
	main_i2c3_pins_default: main-i2c3-default-pins {
		pinctrl-single,pins = <
			J784S4_IOPAD(0x0f0, PIN_INPUT, 10) /* (AC38) MMC1_DAT3.I2C3_SCL */
			J784S4_IOPAD(0x0f4, PIN_INPUT, 10) /* (AA32) MMC1_DAT2.I2C3_SDA */
		>;
	};
	mcasp0_pins_default: mcasp0-default-pins {
       		 pinctrl-single,pins = <
			J784S4_IOPAD(0x038, PIN_OUTPUT, 1) /* (AK35) MCASP0_ACLKX */
			J784S4_IOPAD(0x03c, PIN_OUTPUT, 1) /* (AK38) MCASP0_AFSX */
			J784S4_IOPAD(0x044, PIN_INPUT, 1) /* (AG37) MCASP0_AXR1 */
			J784S4_IOPAD(0x048, PIN_OUTPUT, 1) /* (AK33) MCASP0_AXR2 */
			J784S4_IOPAD(0x084, PIN_INPUT, 1) /* (AG38) MCASP0_AXR5 */
			J784S4_IOPAD(0x088, PIN_OUTPUT, 1) /* (AF36) MCASP0_AXR6 */
		>;
	};
	mcasp1_pins_default: mcasp1-default-pins {
		pinctrl-single,pins = <
			J784S4_IOPAD(0x0b8, PIN_OUTPUT, 1) /* (AC34) MCASP1_ACLKX */
			J784S4_IOPAD(0x0bc, PIN_OUTPUT, 1) /* (AD33) MCASP1_AFSX */
			J784S4_IOPAD(0x0c0, PIN_OUTPUT, 1) /* (AD38) MCASP1_AXR0 */
			J784S4_IOPAD(0x0b4, PIN_OUTPUT, 1) /* (AL34) MCASP1_AXR4 */
		>;
	};
	mcasp3_pins_default: mcasp3-default-pins {
		pinctrl-single,pins = <
			J784S4_IOPAD(0x0cc, PIN_OUTPUT, 3) /* (AM37) SPI0_CS0.MCASP3_ACLKX */
			J784S4_IOPAD(0x0d0, PIN_OUTPUT, 3) /* (AP38) SPI0_CS1.MCASP3_AFSX */
			J784S4_IOPAD(0x0d4, PIN_OUTPUT, 3) /* (AN38) SPI0_CLK.MCASP3_AXR0 */
			J784S4_IOPAD(0x0d8, PIN_OUTPUT, 3) /* (AM35) SPI0_D0.MCASP3_AXR1 */
		>;
	};

	dp0_pins_default: dp0-pins-default {
                pinctrl-single,pins = <
                        J784S4_IOPAD(0x014, PIN_INPUT, 13) /* (AG33) MCAN14_TX.DP0_HPD */
                >;
        };

	main_mcan12_pins_default: mcan12-default-pins {
		pinctrl-single,pins = <
			J784S4_IOPAD(0x008, PIN_INPUT, 0) /* (AJ33) MCAN12_RX */
			J784S4_IOPAD(0x004, PIN_INPUT, 0) /* (AG36) MCAN12_TX */
		>;
	};

	main_mcan13_pins_default: main-mcan13-default-pins {
		pinctrl-single,pins = <
			J784S4_IOPAD(0x010, PIN_INPUT, 0) /* (AH33) MCAN13_RX */
			J784S4_IOPAD(0x00c, PIN_INPUT, 0) /* (AF33) MCAN13_TX */
		>;
	};

	main_mcan3_pins_default: main-mcan3-default-pins {
		pinctrl-single,pins = <
			J784S4_IOPAD(0x080, PIN_INPUT, 0) /* (AK34) MCASP0_AXR4.MCAN3_RX */
			J784S4_IOPAD(0x07c, PIN_OUTPUT, 0) /* (AJ38) MCASP0_AXR3.MCAN3_TX */
		>;
	};

	main_mcan15_pins_default: main-mcan15-default-pins {
		pinctrl-single,pins = <
			J784S4_IOPAD(0x020, PIN_INPUT, 0) /* (AJ35) MCAN15_RX */
			J784S4_IOPAD(0x01c, PIN_INPUT, 0) /* (AG34) MCAN15_TX */
		>;
	};

	main_mcan16_pins_default: main-mcan16-default-pins {
		pinctrl-single,pins = <
			J784S4_IOPAD(0x028, PIN_INPUT, 0) /* (AE33) MCAN16_RX */
			J784S4_IOPAD(0x024, PIN_INPUT, 0) /* (AH34) MCAN16_TX */
		>;
	};

	main_mcan1_pins_default: main-mcan1-default-pins {
		pinctrl-single,pins = <
			J784S4_IOPAD(0x070, PIN_INPUT, 0) /* (AH38) MCAN1_RX */
			J784S4_IOPAD(0x06c, PIN_OUTPUT, 0) /* (AJ37) MCAN1_TX */
		>;
	};

	main_gpio_default_pins: main-gpio-default-pins {
		pinctrl-single,pins = <
			// Ser1 Touch D1
			J784S4_IOPAD(0x054, PIN_INPUT, 7) /* (AD37) MCASP2_ACLKX.GPIO0_21 */
			// Ser1 Touch D2
			J784S4_IOPAD(0x058, PIN_INPUT, 7) /* (AE37) MCASP2_AFSX.GPIO0_22 */
			// Wake-up Scorpio
			J784S4_IOPAD(0x02c, PIN_OUTPUT, 7) /* (AL32) GPIO0_11 */
			// EN_9V6
			J784S4_IOPAD(0x05c, PIN_OUTPUT, 7) /* (AC36) MCASP2_AXR0.GPIO0_23 */
			// Reset PE3 SCORPIO
			J784S4_IOPAD(0x064, PIN_OUTPUT, 7) /* (AF38) MCAN0_TX.GPIO0_25 */
			// PCIE IRQ In
			J784S4_IOPAD(0x0b0, PIN_INPUT, 7) /* (AL33) MCASP1_AXR3.GPIO_44 */
			// EN_12V6
			J784S4_IOPAD(0x000, PIN_OUTPUT, 7) /* (AN35) EXTINTn.GPIO0_0 */
		>;
	};
};

&main_gpio0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_gpio_default_pins>;
};


/* RS485 based 5Pin UART */
&main_uart3 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart3_pins_default>;
	/* Uart Enable pin need to be configured from gpio expander*/
};

/* RS232 Based 5Pin UART */
&main_uart4 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart4_pins_default>;
};

/* RS232 Based 3Pin UART */
&main_uart5 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart5_pins_default>;
};

/* RS232 Based 3Pin UART */
&main_uart7 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart7_pins_default>;
};


/* Connected with MAX96789 Serializer */
&main_i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <400000>;
};

/* Connected with A2B transiver and USB HUB */
&main_i2c2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c2_pins_default>;
	clock-frequency = <400000>;
};

/* Connected with MAX96745 Serializer */
&main_i2c3 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c3_pins_default>;
	clock-frequency = <400000>;
};

&main_mcan12 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_mcan12_pins_default>;
	phys = <&transceiver1>;
};

&mcu_mcan0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_mcan0_pins_default>;
};

&main_mcan13 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_mcan13_pins_default>;
};

&main_mcan3 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_mcan3_pins_default>;
};

&main_mcan15 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_mcan15_pins_default>;
};

&main_mcan16 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_mcan16_pins_default>;
};

&main_mcan1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_mcan1_pins_default>;
};

&mailbox0_cluster0 {
	status = "okay";
	interrupts = <436>;

	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&mailbox0_cluster1 {
	status = "okay";
	interrupts = <432>;

	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&mailbox0_cluster2 {
	status = "okay";
	interrupts = <428>;

	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&mailbox0_cluster3 {
	status = "okay";
	interrupts = <424>;

	mbox_main_r5fss2_core0: mbox-main-r5fss2-core0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_main_r5fss2_core1: mbox-main-r5fss2-core1 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&mailbox0_cluster4 {
	status = "okay";
	interrupts = <420>;

	mbox_c71_0: mbox-c71-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_c71_1: mbox-c71-1 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&mailbox0_cluster5 {
	status = "okay";
	interrupts = <416>;

	mbox_c71_2: mbox-c71-2 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_c71_3: mbox-c71-3 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&mcu_r5fss0_core0 {
	status = "okay";
	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
			<&mcu_r5fss0_core0_memory_region>;
};

&mcu_r5fss0_core1 {
	status = "okay";
	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
			<&mcu_r5fss0_core1_memory_region>;
};

&main_r5fss0_core0 {
	status = "okay";
	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
	memory-region = <&main_r5fss0_core0_dma_memory_region>,
			<&main_r5fss0_core0_memory_region>;
};

&main_r5fss0_core1 {
	status = "okay";
	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
	memory-region = <&main_r5fss0_core1_dma_memory_region>,
			<&main_r5fss0_core1_memory_region>;
};

&main_r5fss1_core0 {
	status = "okay";
	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
	memory-region = <&main_r5fss1_core0_dma_memory_region>,
			<&main_r5fss1_core0_memory_region>;
};

&main_r5fss1_core1 {
	status = "okay";
	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
	memory-region = <&main_r5fss1_core1_dma_memory_region>,
			<&main_r5fss1_core1_memory_region>;
};

&main_r5fss2_core0 {
	status = "okay";
	mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core0>;
	memory-region = <&main_r5fss2_core0_dma_memory_region>,
			<&main_r5fss2_core0_memory_region>;
};

&main_r5fss2_core1 {
	status = "okay";
	mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core1>;
	memory-region = <&main_r5fss2_core1_dma_memory_region>,
			<&main_r5fss2_core1_memory_region>;
};

&c71_0 {
	status = "okay";
	mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
	memory-region = <&c71_0_dma_memory_region>,
			<&c71_0_memory_region>;
};

&c71_1 {
	status = "okay";
	mboxes = <&mailbox0_cluster4 &mbox_c71_1>;
	memory-region = <&c71_1_dma_memory_region>,
			<&c71_1_memory_region>;
};

&c71_2 {
	status = "okay";
	mboxes = <&mailbox0_cluster5 &mbox_c71_2>;
	memory-region = <&c71_2_dma_memory_region>,
			<&c71_2_memory_region>;
};

&c71_3 {
	status = "okay";
	mboxes = <&mailbox0_cluster5 &mbox_c71_3>;
	memory-region = <&c71_3_dma_memory_region>,
			<&c71_3_memory_region>;
};


&dss {
	status = "okay";
	assigned-clocks = <&k3_clks 218 2>,
			  <&k3_clks 218 5>,
			  <&k3_clks 218 14>,
			  <&k3_clks 218 18>;
	assigned-clock-parents = <&k3_clks 218 3>,
				 <&k3_clks 218 7>,
				 <&k3_clks 218 16>,
				 <&k3_clks 218 22>;
};

&dss_ports {
	#address-cells = <1>;
	#size-cells = <0>;

	 /* DP */
	port@0 {
		reg = <0>;
		dpi0_out: endpoint {
			remote-endpoint = <&dp0_in>;
		};
	};

	port@2 {
		reg = <2>;
		dpi2_out: endpoint {
			remote-endpoint = <&dsi0_in>;
		};
	};

	port@3 {
		reg = <3>;
		dpi3_out: endpoint {
			remote-endpoint = <&dsi1_in>;
		};
	};
};

&dphy_tx0 {
	status = "okay";
};

&dsi0_ports {
	#address-cells = <1>;
	#size-cells = <0>;
	port@0 {
		reg = <0>;
		dsi0_out: endpoint {
			remote-endpoint = <&panel0_bridge_in>;
		};
	};

	port@1 {
		reg = <1>;
		dsi0_in: endpoint {
			remote-endpoint = <&dpi2_out>;
		};
	};
};

&dphy_tx1 {
	status = "okay";
};

&dsi1_ports {
	#address-cells = <1>;
	#size-cells = <0>;
	port@0 {
		reg = <0>;
		dsi1_out: endpoint {
			remote-endpoint = <&panel1_bridge_in>;
		};
	};

	port@1 {
		reg = <1>;
		dsi1_in: endpoint {
			remote-endpoint = <&dpi3_out>; // TODO not sure !!!
		};
	};
};

&dsi0 {
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;
	dsi_bridge_0: bridge@0 {
		compatible = "toshiba,tc358762";
		reg = <0>;

		ports {
		#address-cells = <1>;
		#size-cells = <0>;

			port@0 {
				reg = <0>;
				panel0_bridge_in: endpoint {
					remote-endpoint = <&dsi0_out>;
				};
			};

			port@1 {
				reg = <1>;
				panel0_bridge_out: endpoint {
					remote-endpoint = <&max96789_in_0>;
				};
			};
		};
	};
};

&dsi1 {
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;
	dsi_bridge_1: bridge@0 {
		compatible = "toshiba,tc358762";
		reg = <0>;

		ports {
		#address-cells = <1>;
		#size-cells = <0>;

			port@0 {
				reg = <0>;
				panel1_bridge_in: endpoint {
					remote-endpoint = <&dsi1_out>;
				};
			};

			port@1 {
				reg = <1>;
				panel1_bridge_out: endpoint {
					remote-endpoint = <&max96789_in_1>;
				};
			};
		};
	};
};


&serdes_wiz4 {
	status = "okay";
};

&serdes4 {
	status = "okay";
	serdes4_dp_link: phy@0 {
		reg = <0>;
		cdns,num-lanes = <4>;
		#phy-cells = <0>;
		cdns,max-bit-rate = <2700>;
		cdns,phy-type = <PHY_TYPE_DP>;
		resets = <&serdes_wiz4 1>, <&serdes_wiz4 2>,
			 <&serdes_wiz4 3>, <&serdes_wiz4 4>;
	};
};


&dp0_ports {
	#address-cells = <1>;
	#size-cells = <0>;
	port@0 {
		reg = <0>;

		dp0_in: endpoint {
			remote-endpoint = <&dpi0_out>;
		};
	};

	port@4 {
		reg = <4>;

		dp0_out: endpoint {
			remote-endpoint = <&dp0_connector_in>;
		};
	};
};

&mhdp {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&dp0_pins_default>;
	phys = <&serdes4_dp_link>;
	phy-names = "dpphy";
};

&k3_clks {
	/* Confiure AUDIO_EXT_REFCLK2 pin as output */
	pinctrl-names = "default";
//	pinctrl-0 = <&audio_ext_refclk1_pins_default>;
};


&mcasp0 {
	status = "okay";
	#sound-dai-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&mcasp0_pins_default>;
	op-mode = <0>;          /* MCASP_IIS_MODE */
	tdm-slots = <2>;
	auxclk-fs-ratio = <256>;
	serial-dir = <	/* 0: INACTIVE, 1: TX, 2: RX */   // first row 0 0 1 0
		0 2 1 0
		0 2 1 0
		0 0 0 0
		0 0 0 0
	>;
	tx-num-evt = <0>;
	rx-num-evt = <0>;
};

&mcasp1 {
	status = "okay";
	#sound-dai-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&mcasp1_pins_default>;
	op-mode = <0>;          /* MCASP_IIS_MODE */
	tdm-slots = <2>;
	auxclk-fs-ratio = <256>;
	serial-dir = <	/* 0: INACTIVE, 1: TX, 2: RX */
		1 0 0 0
		1 0 0 0
		0 0 0 0
		0 0 0 0
	>;
	tx-num-evt = <0>;
	rx-num-evt = <0>;
};

&mcasp3 {
	status = "okay";
	#sound-dai-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&mcasp3_pins_default>;
	op-mode = <0>;          /* MCASP_IIS_MODE */
	tdm-slots = <2>;
	auxclk-fs-ratio = <256>;
	serial-dir = <	/* 0: INACTIVE, 1: TX, 2: RX */
		1 1 0 0
		0 0 0 0
		0 0 0 0
		0 0 0 0
	>;
	tx-num-evt = <0>;
	rx-num-evt = <0>;
};

Regards

Ajins

0 Jared McArthur 8 months ago in reply to Ajins S

TI__Mastermind 19900 points

Hi Ajins,

The scontrols for amixer come from the codec driver. For example, if you look within the pcm3168a driver (codec used in the k3-j784s4-evm.dts), you will see all of the settings that amixer lists:

root@j784s4-evm:~# amixer -c0
Simple mixer control 'codec-1 ADC Overflow Flag Polarity',0
  Capabilities: enum
  Items: 'Active High' 'Active Low'
  Item0: 'Active High'
Simple mixer control 'codec-1 ADC Volume Control Type',0
  Capabilities: enum
  Items: 'Individual' 'Master + Individual'
  Item0: 'Individual'
Simple mixer control 'codec-1 ADC Volume Rate Multiplier',0
  Capabilities: enum
  Items: '2048' '4096'
  Item0: '2048'
Simple mixer control 'codec-1 ADC1',0
  Capabilities: cvolume
  Capture channels: Front Left - Front Right
  Limits: Capture 0 - 241
  Front Left: Capture 197 [82%] [-2.00dB]
  Front Right: Capture 197 [82%] [-2.00dB]
Simple mixer control 'codec-1 ADC1 Connection Type',0
  Capabilities: enum
  Items: 'Differential' 'Single-Ended'
  Item0: 'Differential'
  Item1: 'Differential'
Simple mixer control 'codec-1 ADC1 High-Pass Filter',0
  Capabilities: pswitch pswitch-joined
  Playback channels: Mono
  Mono: Playback [on]
Simple mixer control 'codec-1 ADC1 Invert',0
  Capabilities: pswitch
  Playback channels: Front Left - Front Right
  Mono:
  Front Left: Playback [off]
  Front Right: Playback [off]
Simple mixer control 'codec-1 ADC1 Mute',0
  Capabilities: pswitch
  Playback channels: Front Left - Front Right
  Mono:
  Front Left: Playback [off]
  Front Right: Playback [off]
Simple mixer control 'codec-1 ADC2',0
  Capabilities: cvolume
  Capture channels: Front Left - Front Right
  Limits: Capture 0 - 241
  Front Left: Capture 197 [82%] [-2.00dB]
  Front Right: Capture 197 [82%] [-2.00dB]
Simple mixer control 'codec-1 ADC2 Connection Type',0
  Capabilities: enum
  Items: 'Differential' 'Single-Ended'
  Item0: 'Differential'
  Item1: 'Differential'
Simple mixer control 'codec-1 ADC2 High-Pass Filter',0
  Capabilities: pswitch pswitch-joined
  Playback channels: Mono
  Mono: Playback [on]
Simple mixer control 'codec-1 ADC2 Invert',0
  Capabilities: pswitch
  Playback channels: Front Left - Front Right
  Mono:
  Front Left: Playback [off]
  Front Right: Playback [off]
Simple mixer control 'codec-1 ADC2 Mute',0
  Capabilities: pswitch
  Playback channels: Front Left - Front Right
  Mono:
  Front Left: Playback [off]
  Front Right: Playback [off]
Simple mixer control 'codec-1 ADC3',0
  Capabilities: cvolume
  Capture channels: Front Left - Front Right
  Limits: Capture 0 - 241
  Front Left: Capture 197 [82%] [-2.00dB]
  Front Right: Capture 197 [82%] [-2.00dB]
Simple mixer control 'codec-1 ADC3 Connection Type',0
  Capabilities: enum
  Items: 'Differential' 'Single-Ended'
  Item0: 'Differential'
  Item1: 'Differential'
Simple mixer control 'codec-1 ADC3 High-Pass Filter',0
  Capabilities: pswitch pswitch-joined
  Playback channels: Mono
  Mono: Playback [on]
Simple mixer control 'codec-1 ADC3 Invert',0
  Capabilities: pswitch
  Playback channels: Front Left - Front Right
  Mono:
  Front Left: Playback [off]
  Front Right: Playback [off]
Simple mixer control 'codec-1 ADC3 Mute',0
  Capabilities: pswitch
  Playback channels: Front Left - Front Right
  Mono:
  Front Left: Playback [off]
  Front Right: Playback [off]
Simple mixer control 'codec-1 DAC De-Emphasis',0
  Capabilities: enum
  Items: 'Disabled' '48khz' '44.1khz' '32khz'
  Item0: 'Disabled'
Simple mixer control 'codec-1 DAC Power-Save',0
  Capabilities: pswitch pswitch-joined
  Playback channels: Mono
  Mono: Playback [on]
Simple mixer control 'codec-1 DAC Volume Control Type',0
  Capabilities: enum
  Items: 'Individual' 'Master + Individual'
  Item0: 'Individual'
Simple mixer control 'codec-1 DAC Volume Rate Multiplier',0
  Capabilities: enum
  Items: '2048' '4096'
  Item0: '2048'
Simple mixer control 'codec-1 DAC Zero Flag Function',0
  Capabilities: enum
  Items: 'DAC 1/2/3/4 AND' 'DAC 1/2/3/4 OR' 'DAC 1/2/3 AND' 'DAC 1/2/3 OR' 'DAC 4 AND' 'DAC 4 OR'
  Item0: 'DAC 1/2/3/4 AND'
Simple mixer control 'codec-1 DAC Zero Flag Polarity',0
  Capabilities: enum
  Items: 'Active High' 'Active Low'
  Item0: 'Active High'
Simple mixer control 'codec-1 DAC1',0
  Capabilities: pvolume
  Playback channels: Front Left - Front Right
  Limits: Playback 0 - 201
  Mono:
  Front Left: Playback 201 [100%] [0.00dB]
  Front Right: Playback 201 [100%] [0.00dB]
Simple mixer control 'codec-1 DAC1 Digital Filter roll-off',0
  Capabilities: enum
  Items: 'Sharp' 'Slow'
  Item0: 'Sharp'
Simple mixer control 'codec-1 DAC1 Invert',0
  Capabilities: pswitch
  Playback channels: Front Left - Front Right
  Mono:
  Front Left: Playback [off]
  Front Right: Playback [off]
Simple mixer control 'codec-1 DAC2',0
  Capabilities: pvolume
  Playback channels: Front Left - Front Right
  Limits: Playback 0 - 201
  Mono:
  Front Left: Playback 201 [100%] [0.00dB]
  Front Right: Playback 201 [100%] [0.00dB]
Simple mixer control 'codec-1 DAC2 Digital Filter roll-off',0
  Capabilities: enum
  Items: 'Sharp' 'Slow'
  Item0: 'Sharp'
Simple mixer control 'codec-1 DAC2 Invert',0
  Capabilities: pswitch
  Playback channels: Front Left - Front Right
  Mono:
  Front Left: Playback [off]
  Front Right: Playback [off]
Simple mixer control 'codec-1 DAC3',0
  Capabilities: pvolume
  Playback channels: Front Left - Front Right
  Limits: Playback 0 - 201
  Mono:
  Front Left: Playback 201 [100%] [0.00dB]
  Front Right: Playback 201 [100%] [0.00dB]
Simple mixer control 'codec-1 DAC3 Digital Filter roll-off',0
  Capabilities: enum
  Items: 'Sharp' 'Slow'
  Item0: 'Sharp'
Simple mixer control 'codec-1 DAC3 Invert',0
  Capabilities: pswitch
  Playback channels: Front Left - Front Right
  Mono:
  Front Left: Playback [off]
  Front Right: Playback [off]
Simple mixer control 'codec-1 DAC4',0
  Capabilities: pvolume
  Playback channels: Front Left - Front Right
  Limits: Playback 0 - 201
  Mono:
  Front Left: Playback 201 [100%] [0.00dB]
  Front Right: Playback 201 [100%] [0.00dB]
Simple mixer control 'codec-1 DAC4 Digital Filter roll-off',0
  Capabilities: enum
  Items: 'Sharp' 'Slow'
  Item0: 'Sharp'
Simple mixer control 'codec-1 DAC4 Invert',0
  Capabilities: pswitch
  Playback channels: Front Left - Front Right
  Mono:
  Front Left: Playback [off]
  Front Right: Playback [off]
Simple mixer control 'codec-1 Master',0
  Capabilities: pvolume pvolume-joined cvolume cvolume-joined
  Playback channels: Mono
  Capture channels: Mono
  Limits: Playback 0 - 201 Capture 0 - 241
  Mono: Playback 201 [100%] [0.00dB] Capture 197 [82%] [-2.00dB]

The snd-soc-dummy codec isn't a real codec, and doesn't have any controls. Because of this, you can't set the volume in amixer.

Best,
Jared

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PROCESSOR-SDK-J784S4: How to control the volume using amixer command