• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 98 subscribers
  • Views 185 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM3352: DDR3 Design

Erfan Omidvar
Prodigy 120 points

Part Number: AM3352

Tool/software:

Hello,

I am designing a PCB using the AM3352BZCZ30 and a 4GBIT 16-bit DDR3 memory (D2516ECMDXGJD-U), which also benefits from ODT. I have three questions.

First, after reviewing TI’s open-source schematic files, I noticed that they used termination resistors for DDR2 memory, but not for DDR3. I’m wondering if I should use them for DDR3 as well?

Second, the datasheets suggest that DDR routing should be done on the same layer, or at most, two layers. However, in their files, I see that they routed the signals across different layers. Is this acceptable? For instance, can I route my data lines on both the top and bottom layers, and address lines on the top and inner layers, or is there a specific configuration I should follow?

Lastly, I see that DQS0, DQSN0, and DQS1,DQSN1 are differential pairs, but in their files, they were not defined as such and were routed separately and uncoupled. How should I handle this in my design?

Regards,

  • 0
    TI__Guru* 95741 points

    Termination resistors should not be used for DDR3.  Ideally you should follow the data sheet guidelines.  Ensure that when routing on different layers, that there is a clearly defined reference layer for the signals.  DQS differential pairs should be routed as such.  Which files are you talking about which have them routed separately?  Can you provide specifics?

    Regards,

    James