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AM62A7: Memory Mapping Rules for HSM Access to MCU RAM on AM62A

Part Number: AM62A7


Tool/software:

Hi TI,

Through testing, we’ve found that the mapping rule for ​DDR16SS0_SDRAM​ is an offset of ​0x20000000. However, we still don't know the corresponding offset for ​MCU_MSRAM_256K0_RAM and ​MCU_MSRAM_256K1_RAM.

Could you please confirm whether these 2 sections support HSM access. If so, what are the memory mapping rules?

Your clarification would be greatly appreciated.


Best regards,
Yang

  • Dear cusotmer , 

      What you observed is in rat_init funciton.

      You can modify the rat configuraiton as required.

      Note here, as to the internal RAM may used for other core's applicaiton. high risck to system stability if the access without know the destination for.

    Regards,

    Linjun