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[FAQ] TDA4VH-Q1: LBIST HW POST registers analysis

Part Number: TDA4VH-Q1

Tool/software:

Why is my LBIST status read by invoking the function 'SDL_LBIST_getPOSTStatus(&postResult)' - SDL_LBIST_POST_NOT_RUN?

  • Hi,

    Please read the values of the below registers -

    WKUP_CTRL_MMR registers:

    0x43000030: CTRLMMR_WKUP_DEVSTAT
    0x43000038: CTRLMMR_WKUP_POST_SEL_STAT

    0x4300003c: CTRLMMR_WKUP_POST_OPT
    0x4300c000:
    0x4300c004:
    0x4300c008:
    0x4300c00c:
    0x4300c018:

    0x4300c01c: CTRLMMR_WKUP_SMS_LBIST_MISR
    0x4300c280: CTRLMMR_WKUP_SMS_LBIST_ SIG

    0x4300C2C0: CTRLMMR_WKUP_POST_STAT

    0x4300d008: CTRLMMR_WKUP_LOCK3_KICK0

    0x4300C2C4:
    0x4300C2CC:

     

    MCU_CTRL_MMR registers:

    0x40F0C000: CTRLMMR_MCU_LBIST_CTRL

    0x40F0C018: CTRLMMR_MCU_LBIST_STAT

    0x40F0C01C: CTRLMMR_MCU_LBIST_MISR

    0x40F0C280: CTRLMMR_MCU_LBIST_SIG

    0x40F0D008: CTRLMMR_MCU_LOCK3_KICK0

    0x40F0D00C: CTRLMMR_MCU_LOCK3_KICK1

    A pre-production device does not have the corresponding LBIST_SIG registers (eg: 0x4300C280) programmed. This register reflects the expected MISR values, so the mismatches are expected. Hence the output in your case is SDL_LBIST_POST_NOT_RUN. The work-around on a pre-production device is to hardcode the expectedValue to match the computed value (which I expect to be the same on every run). This is a work-around, and really not testing POST behavior. You would have to wait for production devices for running these.

    The values in the CTRLMMR_WKUP_POST_OPT (0xA0F0E) and CTRLMMR_WKUP_POST_SEL_STAT (0x0) do indicate that the POST DMSC and MCU LBIST/PBIST efuses are enabled. 

    The actual HWPOST behavior is dictated by the MCU_BOOTMODE[9:8] pins - and these are expected to be either [00] or [01] to run POST.

    The CTRLMMR_WKUP_POST_STAT (0x4300_C2C0) in general should read 0x103 on a successful completion with no other TimeOut or Error Bits set. This atleast indicates the completion of POST. This register will read 0 if you bypass the POST. This shows that in your case the POST has completed successfully. The LBIST computed MISR values are then matched against the expected MISR values (which are not programmed on this samples) to really indicate a LBIST success.

    The LBIST_TIMEOUT/FAIL bits do indicate a failure, these are expected to be 0 on success cases. The LBIST_MISR register will hold the computed value, and the LBIST_SIG registers have the expected values.The LBIST SIG registers will only be programmed on the Production/RTM samples along with Fast POST mode.

    HWPOST will only be possible when you use Production samples. This would not be from any of the current XJ721S2xxxx/XJ784S4xxxx samples, the official production samples will have a TDA4VLxxxxxxx/TDA4VHxxxxxxx designation.

    Regards,
    Josiitaa