This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

L2 and L1D configuration for the DSP on TI816x

Other Parts Discussed in Thread: TMS320DM8148

Hi TI experts,

I want to configure all L2 and L1D as cache for the DSP  on the TI816x.
Can anyone help with that?

Thanks,
Gabi

  • In EZSDK, the DSP cache config can be found here:

     

    <OMX_ROOT>/packages/ti/omx/build/dspsubsys.xs

     

    if (soc == 'ti814x') {

     var device = 'TMS320DM8148';

     Build.platformTable['ti.platforms.evmDM8148'] =

      {

        l1DMode:"32k",

        l1PMode:"32k",

        l2Mode:"128k",

        externalMemoryMap: MemSegDefine.getMemSegmentDefinition(platFormMem),

        codeMemory:"DSP",

        dataMemory:"DSP",

        stackMemory:"DSP"

      };


    }

    You can change l2Mode to 256k to use the entireL2 Memory as L2 Cache.

    Please refer to the C674x TRM for more details.

     

    Archith