Other Parts Discussed in Thread: AM625
Tool/software:
Hi, TI
I have been debugging the U-boot splash screen function recently and have two questions that I would like to answer.
1. Background: Our custom development board has two models, using RGB888 interface and single LVDS interface for video. Both custom boards use EMMC UDA RAW mode boot.
2. Problems encountered:
(1) When I execute the 'bmp display $loadaddr m m' command on the uboot command line, the following error is reported. I saw some posts on e2e, it seems that TI only verified on the dual LVDS interface?
=> ls mmc 0 /boot
<DIR> 4096 .
<DIR> 4096 ..
<DIR> 4096 dtb
20212224 Image
12285 ti_logo_414x97_32bpp.bmp.gz
=> ext4load mmc 0 $loadaddr /boot/ti_logo_414x97_32bpp.bmp.gz
This will not be a case any time
12285 bytes read in 18 ms (666 KiB/s)
=> bmp display $loadaddr m m
single-pinctrl pinctrl@f4000: configuring pins for main-dss0-pins-default
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f4100/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40f8/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f4104/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40fc/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40b8/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40bc/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40c0/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40c4/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40c8/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40cc/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40d0/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40d4/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40d8/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40dc/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40e0/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40e4/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40e8/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40ec/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40f0/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f40f4/0x00010000
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f405c/0x00010001
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f4060/0x00010001
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f4064/0x00010001
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f4068/0x00010001
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f406c/0x00010001
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f4070/0x00010001
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f4074/0x00010001
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f4078/0x00010001
ti_ehrpwm pwm@23010000: regs=0x23010000
single-pinctrl pinctrl@f4000: configuring pins for main-epwm1-a-pins-default
single-pinctrl pinctrl@f4000: reg/val 0x00000000000f419c/0x00010006
tidss_drv dss@30200000: vidl1: bufsize 2560, buf_threshold 2559/1280, mflag threshold 1706/853 preload 1280
tidss_drv dss@30200000: vid1: bufsize 2560, buf_threshold 2559/1280, mflag threshold 1706/853 preload 1280
tidss_drv dss@30200000: vp1: new rate 51923076 Hz (requested 51912000 Hz)
tidss_drv dss@30200000: dss_vp_set_gamma: hw_videoport 1, lut len 0, hw len 256
tidss_drv dss@30200000: dss_vp_write_gamma_table: hw_videoport 1
tidss_drv dss@30200000: DSS fclk 250000000 Hz
"Synchronous Abort" handler, esr 0x96000004
elr: 000000008086a114 lr : 000000008086ce14 (reloc)
elr: 000000009b64e114 lr : 000000009b650e14
x0 : 0000000000000000 x1 : 0001010100000000
x2 : 000000000000000a x3 : 0000000002800000
x4 : 0000000002800000 x5 : 00000000995b4529
x6 : 0000000000000030 x7 : 00000000995b49b0
x8 : 000000000000000c x9 : 0000000000000008
x10: 00000000ffffffe0 x11: 0000000000000006
x12: 000000000001869f x13: 0000000000000000
x14: 0000000000000000 x15: 0000000000000000
x16: 000000009b64bbb0 x17: 00000000996d8f00
x18: 00000000995c4d80 x19: 000000009b6a7b20
x20: 0000000000000000 x21: 00000000995c7f50
x22: 000000009b6c8a71 x23: 000000009b6c75c0
x24: 00000000995baeb8 x25: 0000000000000355
x26: 00000000995cd360 x27: 0000000000000500
x28: 0000000000000002 x29: 00000000995b49c0
Code: d65f03c0 128002a0 17fffffa f9400001 (f9403421)
Resetting CPU ...
resetting ...
（2）Due to our startup mode being EMMC UDA RAW mode, I have made modifications to 'board/ti/am62x/evm. c'. As shown below, I changed the value of ". flags" in the second item of the structure array from "SPLASH_STORAGE-FS" to "SPLASH_STORAGE-RAW". I have already written the command 'ext4load mmc 0 $loadaddr/boot/tilog_414x97_32bpp. bmp. gz' into the environment variable of uboot, but according to the uboot startup log, before executing the uboot command, uboot had already reported the error 'Bad gzipped data there is no valid bmp file at the given address'. Has TI validated EMMC's "SPLASH_STORAGE-RAW"? If so, how should I load ti-logo_414x97_32bpp.bbm.gz?
static struct splash_location default_splash_locations[] = {
{
.name = "sf",
.storage = SPLASH_STORAGE_SF,
.flags = SPLASH_STORAGE_RAW,
.offset = 0x700000,
},
{
.name = "mmc",
.storage = SPLASH_STORAGE_MMC,
.flags = SPLASH_STORAGE_RAW,
.devpart = "0:1",
},
};
U-Boot SPL 2023.04-00007-g639d43ac-dirty (Mar 05 2025 - 17:55:17 +0800) SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.8--v09.02.08 (Kool Koala)') SPL initial stack usage: 13408 bytes Trying to boot from MMC1 Authentication passed Authentication passed Authentication passed Loading Environment from nowhere... OK init_env from device 9 not supported! Authentication passed Authentication passed Starting ATF on ARM64 core... NOTICE: BL31: v2.10.0(release):v2.10.0-367-g00f1ec6b87-dirty NOTICE: BL31: Built : 16:09:05, Feb 9 2024 U-Boot SPL 2023.04-00007-g639d43ac-dirty (Mar 06 2025 - 17:04:44 +0800) SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.8--v09.02.08 (Kool Koala)') SPL initial stack usage: 1856 bytes Error: Bad gzipped data There is no valid bmp file at the given address Trying to boot from MMC1 Warning: Did not detect image signing certificate. Skipping authentication to prevent boot failure. This will fail on Security Enforcing(HS-SE) devices Warning: Did not detect image signing certificate. Skipping authentication to prevent boot failure. This will fail on Security Enforcing(HS-SE) devices U-Boot 2023.04-00007-g639d43ac-dirty (Mar 06 2025 - 17:50:29 +0800) SoC: AM62X SR1.0 HS-FS Model: Texas Instruments AM62x HMI DRAM: 512 MiB Core: 64 devices, 34 uclasses, devicetree: separate MMC: mmc@fa10000: 0 Loading Environment from nowhere... OK Error: Bad gzipped data There is no valid bmp file at the given address In: serial Out: serial Err: serial Net: eth0: ethernet@8000000port@1 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0(part 0) is current device ...................env test1........................... This will not be a case any time 12285 bytes read in 18 ms (666 KiB/s) SD/MMC found on device 0 Failed to load 'boot.scr' Can't set block device echo ...................env test2........................... This will not be a case any time 12285 bytes read in 18 ms (666 KiB/s) ## Error: "main_cpsw0_qsgmii_phyinit" not defined This will not be a case any time 20212224 bytes read in 807 ms (23.9 MiB/s) This will not be a case any time 57631 bytes read in 21 ms (2.6 MiB/s) Working FDT set to 88000000 ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Working FDT set to 88000000
