TDA4VM: TDA4 SPI config in DTS

Hi Yang,

No, SPI5 pins do not have to be configured within PDK. They need to be only configured within Linux devicetree if the SPI interface is planned to be used from Linux, or only within PDK if the SPI interface is planned to be used from RTOS, but not both at the same time to avoid resource conflict.

yanggc said:

  Besides, I used CS1 in SPI5, should the parameter 'reg=<0>' be modified to 'reg=<1>'?

This is the register property, and in this particular case it is indicating that the spidev device is located at an offset of 0 within the parent bus, main_spi5.

Please feel free to ask more questions if you are trying out the Linux spidev example and are finding that spi is not working. Full logs from "dmesg" will be helpful to identify current situation being observed.

Regards,

Takuma

Hi,

I want to export GPO0_40 under/dev/gpiochip0, but after configuring it according to the above content, I found that there is no such node. Can you tell me how to configure it?

main_spi3_pins_default: main-spi3-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0x144, PIN_INPUT, 4) /* (Y25) PRG0_PRU1_GPO17.SPI3_CLK */
J721E_IOPAD(0x11c, PIN_INPUT, 4) /* (AA24) PRG0_PRU1_GPO7.SPI3_CS0 */
J721E_IOPAD(0xd4, PIN_INPUT, 4) /* (AB26) PRG0_PRU0_GPO9.SPI3_CS1 */
J721E_IOPAD(0xd8, PIN_INPUT, 4) /* (AB25) PRG0_PRU0_GPO10.SPI3_CS2 */
J721E_IOPAD(0x124, PIN_INPUT, 4) /* (Y24) PRG0_PRU1_GPO9.SPI3_CS3 */
J721E_IOPAD(0x148, PIN_INPUT, 4) /* (AA26) PRG0_PRU1_GPO18.SPI3_D0 */
J721E_IOPAD(0x14c, PIN_INPUT, 4) /* (AA29) PRG0_PRU1_GPO19.SPI3_D1 */
J721E_IOPAD(0xa4, PIN_INPUT, 7) /* (AH22) PRG1_PRU1_GPO19.GPIO0_40 */
>;
};

&main_spi3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_spi3_pins_default>;
gpios = <&main_gpio0 40 GPIO_ACTIVE_HIGH>;

spidev@0 {
compatible = "ti,spi-evm";
spi-max-frequency = <3125000>;
reg = <0>;
spi-cpol = <1>; // CPOL = 1
spi-cpha = <1>; // CPHA = 1
};
spidev@1 {
compatible = "ti,spi-evm";
spi-max-frequency = <3125000>;
reg = <1>;
spi-cpol = <0>; // CPOL = 0
spi-cpha = <1>; // CPHA = 1
};
spidev@2 {
compatible = "ti,spi-evm";
spi-max-frequency = <3125000>;
reg = <2>;
spi-cpol = <0>; // CPOL = 0
spi-cpha = <0>; // CPHA = 0
// interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
};
spidev@3 {
compatible = "ti,spi-evm";
spi-max-frequency = <3125000>;
reg = <3>;
spi-cpol = <0>; // CPOL = 0
spi-cpha = <1>; // CPHA = 1
};
};

Regards,

Yang

Hi,

  Thank you very much for your answer. As there is an external input to the GPIO of TDA4, I need to read the GPIO status during SPI communication in Linux to determine when to start sending.

Reagrds，

Yang

Hi Yang,

Understood. If there are follow up questions please feel free to post or open up a new thread.

Regards,

Takuma