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How to read/write address & data to/from GPMC while interfacing with NOR memory?

tan jr
Prodigy 70 points

Hi,

I'm using AM389x, and I'm writing a device driver to communicate with FPGA through GPMC. I read through the the Technical Reference Manual : SPRUGX7, found here: http://www.ti.com/general/docs/litabsmultiplefilelist.tsp?literatureNumber=sprugx7

Chapter 9 of this TRM talks about how to the setup process such as: initialization, configurations, and timing parameters setup. There is a list of registers shown at the end of this chapter for doing all the the setup process.

From my understanding, after the initialization and setting up of GPMC, communication to the NAND memory can be done through the 3 registers: GPMC_NAND_COMMAND_i, GPMC_NAND_ADDRESS_i, GPMC_NAND_DATA_i. (Is this understanding correct?)

However, I cannot find the equivalent registers for NOR memory. So the question is, while GPMC handles all the interfacing job to the NOR memory according to my settings, which register I should read/write my address and data from/to GPMC for NOR?

I did a search in the kernel source code for some GPMC examples, I found ../arch/arm/mach-omap2/gpmc.c; this source file contains many functions for setting up GPMC, it also has functions like gpmc_nand_write() and gpmc_nand_read() for communication with NAND, but nothing is found for NOR again..

I'm very new to embedded programming, I spent a few days re-reading the TRM but could not find the answer, I think I'm missing something.. please help!

Thanks!

  • 0
    TI__Guru*** 125430 points

    Keep in mind a couple key differences between NOR and NAND flash:

    • With NOR flash you can just read directly from the memory like an async SRAM, i.e. you just provide an address to the NOR flash and then read back the corresponding data.  Generally there are separate address and data pins.
    • For writing to NOR flash there's a sequence of writes/commands performed in order to initiate the write.
    • With NAND flash there are no address pins -- everything goes over the data pins.  There's a lot of protocol involved even to read from a NAND flash.

    In order to perform an access to the NOR flash you need to look up the address range that corresponds to the GPMC.  You simply perform a read/write to that address range and then you'll see the access on the bus.