TDA4VH-Q1: Using SGMII5 and -7 from SERDES2 without additional 100MHz external reference clock source?

Hi,

SH said:

Is it possible to use SGMII interfaces from the SoC without additional 100MHz external reference clock source, so that the only clock input to the SoC would be the oscillator at WKUP_OSC0?

Yes, it is possible to use Internal clock from PLLs.
MAIN_PLL2_HSDIV4 is 100MHz by default can choose as parent clock of serdes reference clock.

SH said:

In EVM design (PROC141E5) on the SoC schematics symbol both the PCIE_REFCLK0 and PCIE_REFCLK2 outputs are associated with SERDES1 block.
Can I use for example PCIE_REFCLK2 output to clock SGMII5 and -7 interfaces from SERDES2?

No, need you can use internal clock it self.

Best Regards,
Sudheer

Hi,

SH said:

But don't I still need clock signals for SGMII, for communicating between SoC and device that I want to communicate with?

Are you using MAC or PHY as peer device to communicate with TDA4's MAC.

If device (MAC/PHY) supports internal clock you can use those, if not you need to use external clock.

TDA4 can generate the internal clocks and use for SerDes.

SH said:

If I use SGMII5 and -7 from SERDES2 what are my options for the clock signal outputs from the SoC?

For SGMII interface clock was 100MHz.
You can use SOC output clock to drive the external device.
But, on TI EVMs we are using external clock source for QSGMII PHY. Please refer to EVM schematics for your reference.
https://www.ti.com/tool/J784S4XEVM

Best Regards,
Sudheer

Thank you, I think this resolves part of my issue for now,

but I would still be interested in that which of the REFCLK outputs from the SoC can be used with SERDES2 if using the SoC output clock to drive external device?

In Technical Reference Manual (SPRUJ52) Figure 12-125 the PCIE_REFCLK is shown as the clock output and SERDES_REFCLK is shown as input, but in specification (SPRSP79B) Table 5-88 SERDES_REFCLK is defined as IO.

Can SERDES_REFCLK also output the reference clock, or should PCIE_REFCLK always be used for this?

TRM and spec don't specifically highlight that which of the REFCLKs can be used with which SERDES modules. Can I use any of the REFCLKs with SERDES2, or should I use only for example PCIE_REFCLK2 and SERDES_REFCLK2 with SERDES2?

The PCIe_REFCLK output from the ACSPCIe clock buffer is designed to conform to the PCIE ref clk specification.