DRA78XEVM: Sharing EDMA across IPU and DSP

Salvatore Lionetti

Part Number: DRA78XEVM

Tool/software:

Hi,

I need to use both McSPI3 and related EDMA TX/RX channels from a DSP, after these has been initialized by IPU by the boot.

For McSPI everything is fine since its a dedicated controller.

EDMA on the counterside manage/map any peripheral DMA channels.

Do you have any recommendation to "detach" McSPI3 TX/RX EDMA channels from the IPU and "attach" to use it later on DSP?

In my case DSP is using Region3 while IPU is using Region0.

Thanks

7 months ago

0 Takuma Fujiwara 7 months ago

TI__Guru 53193 points

Hi Salvatore,

In general, resources are defined statically in devicetree/predecessor of devicetree when using Linux, and similarly for RTOS, so no example for detaching and attaching specific channels from IPU to DSP.

My recommendation would be to initialize the peripherals used by a certain core by that core, but is there an issue with this approach?

Regards,

Takuma

0 Salvatore Lionetti 7 months ago in reply to Takuma Fujiwara

Prodigy 100 points

Hi Takuma,

Thanks for the response. May I ask:

1) What happen when two Regions, each on a separate processor, enable the same event (DRAEM_k/DCHMAPn/ER_RN_k)?

2) For DCHMAP it's not possible to insert a neutral value (0 means 1st PaRAM) as for CTRL_CORE_DMA_EDMA_DREQ_x_y (0 is a neutral value). Does this may impact DMA event dispatching among cores?

3) Can a core, e.g. DSP, access to both shadow and non-shadow register set?

E.g.

EDMA_TPCC_ER and

EDMA_TPCC_ER_RN_k_<region_from_0>

4) Can a core, e.g. DSP access to both DSP_EDMA_TPCC (base address 0x1D10000) and SYS_EDMA_TPCC (base address 0x43300000), supposing no other cores (DSP and/or IPU) are accessing to them?

Thanks

0 Takuma Fujiwara 7 months ago in reply to Salvatore Lionetti

TI__Guru 53193 points

Hi Salvatore,

I would recommend reading through the EDMA3 FAQ: https://www.ti.com/lit/an/sprac52/sprac52.pdf?ts=1741812465706&ref_url=https%253A%252F%252Fwww.google.com%252F
I would also recommend the EDMA3 user guide: https://www.ti.com/lit/ug/sprugs5b/sprugs5b.pdf?ts=1741812504558

For 4):

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/484507/edma3-on-am5728-rtos-dsp
^ AM57x and DRA7x should be similar architecture, but it looks like in the past our default SPI DMA PDK DSP driver specifies the global EDMA instance at 0x4330xxxx. The above thread changes this to use local EDMA at 0x01D1xxxx to avoid resource conflict with A15 cores, but if the global EDMA instance was not used by A15 or other cores, then DSP should also be able to access this.

Regards,

Takuma

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DRA78XEVM: Sharing EDMA across IPU and DSP