SK-AM62A-LP: changing the drive strength and the delay of the RGMII

Rachel Mizrachi

Intellectual 260 points

Part Number: SK-AM62A-LP

Tool/software:

Hi,

I want to change the drive strength and the delay of the RGMII on our custom board.

Can you tell me please how I can do it via the software?

Thanks,
Rachel

6 months ago

0 Ashwani Goel 6 months ago

TI__Mastermind 27300 points

Hi Rachel Mizrachi,

Thanks for your query.

Assuming Linux use case, I forwarded your query to Linux-Ethernet expert.

Please allow some time to get back to you.

Regards

Ashwani

0 Schuyler Patton 6 months ago in reply to Ashwani Goel

TI__Mastermind 40100 points

Hi,

There is not a way to change the drive strength on the RGMII interface. The tx clock delay respective to data is fixed at 2nS. The PHY will need to delay the rx clock with respect to data. The delay for rx is set in the PHY properties node of the DTS. This setting is dependent on the PHY selected. Could you please describe the PHY being used?

Best Regards,

Schuyler

0 Rachel Mizrachi 6 months ago in reply to Schuyler Patton

Intellectual 260 points

Hi Schuyler,

Thanks on your answer!

I have no PHY, I defined "fixed-link" in dts file.

Thanks,
Rachel

0 Schuyler Patton 6 months ago in reply to Rachel Mizrachi

TI__Mastermind 40100 points

Hi Rachel,

I imagine you are either connecting to an ethernet switch or an FPGA. Please note the data coming from the other device must delay the clock respective to the data. Also please take into account the trace length as this can impact the clock delay as well.

Best Regards,

Schuyler

0 Haim Giladi 5 months ago in reply to Schuyler Patton

Prodigy 80 points

Hello,

Following taken from AM62 TRM:

Please assist us modifying these pins - RGMII1 drive strength

0 Schuyler Patton 5 months ago in reply to Haim Giladi

TI__Mastermind 40100 points

Hi,

Typically pins that are marked reserved are not supported. I will check into if that is case here.

Best Regards,

Schuyler

0 Schuyler Patton 5 months ago in reply to Schuyler Patton

TI__Mastermind 40100 points

Hi,

I confirmed with a hw apps engineer that this register setting is not supported. Pins that are marked reserved are not supported and therefore should not be changed.

Best Regards,

Schuyler

0 Jim Mrowca 5 months ago in reply to Schuyler Patton

Genius 4132 points

Thanks Schuyler - this not changing drive strength and/or slew rates on AM64x is what (13) Kallikuppa Sreenivasa's Profile - Kallikuppa Sreenivasa - TI E2E support forums had discussed with me and he has documented in e2e. AM64x is not an ASIC; i.e. no customer-dial in of slew rates and or drive strength is permitted.

thanks

Jim

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SK-AM62A-LP: changing the drive strength and the delay of the RGMII