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L2 Cache settings

S A Joshi
Prodigy 160 points


Hi,

I'm using Syslink 2.0.2.80 version. I would like to understand the chache settings made in file packages\ti\syslink\samples\rtos\sharedRegion\ti81xx\SharedRegion_ti81xx_dsp.cfg viz:

    Cache.initSize.l1pSize = Cache.L1Size_32K;
    Cache.initSize.l1dSize = Cache.L1Size_32K;
    Cache.initSize.l2Size = Cache.L2Size_32K;
    Cache.MAR128_159 = 0xffffffff;
    Cache.MAR160_191 = 0xffffffff;
    Cache.MAR192_223 = 0xffffffff;
    Cache.MAR224_255 = 0xffffffff;

- Why the L2 cache size is set to 32KB whereas the Centaurs C674 DSP has L2 size as high as 256KB?

- Why the whole of DSP accessible memory is made cachable? Any specific reasoning?

Thanks & Regards,

Joshi

 

  • 0
    TI__Mastermind 22760 points

    Joshi,

    With this configuration, 32K of L2 is configured as cache and the rest is internal RAM.  If you don't need internal RAM, you could configure all of L2 as Cache.  As far as I know, there is no specific reason for making all of the DSP's external memory cacheble, other than for performance.

    Best regards,

        Janet

  • 0 in reply to janet
    Prodigy 160 points

    Thank you Janet for the clarification! An observation from my end is if I try setting L2 cache size as 256KB, the system hangs; maybe the system makes use of portion of internal ram. L2 size of 128KB works fine...