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WD_OUT not pulled low while watch dog time out on DM8148

Eric Chen
Intellectual 810 points

Hi,

    I'm trying to make testing API to verify WDT function on my custom board using DM8148. Firstly I set pin mux PINCNTL262 as function 0x01, then make sure the WDT clock is enabled. I disable WDT, update WDT_WLDR and WDT_WTGR registers then enable WDT.

    The counter value of register WDT_TCRR is increasing. System is reboot while counter overflows. When I probe  WD_OUT, it never pulls down. It seems that only warm reset is issued, but the board power remains.

    In the WDT block diagram (fig. 25-1 in TRM), the reset signal is issued to PRCM to perform warm rest and the WD_OUT. It's strange to me that only warm reset occurs. Does anyone would advice why this happens?

    In table 25-6 in TRM, the global initialization includes "GP device" init. Does it mean the configuration of WDT registers?

    In addition, I try to just set WDT_WLDR as 0xFFFFFFFF and WDT_WTGR as 0x00000000. According to TRM, this would force WDT to generate reset. In such operation, the WD_OUT is never pulled down.

 

Regards,

    Eric

  • 0
    TI__Genius 15310 points

    Eric,

    Attached is the script for WDT.  Please try to run it and let us know if you have any problem.

    Regards,

    Viet

    WDT_DM8148.gel
  • 0 in reply to Viet Dinh
    Intellectual 810 points

    Hi Viet,

        I executed the GEL file you shared to test systemreset (0x481800A0=0x1 or 0x2) and configure WDT to make it time out. The WD_OUT never pulled low.

        As I review document SPRS647A, it described about RSTOUT_WD_OUT Configuration in section 3.1 Boot Configuration. I found that if I pulled the pin AA27 (Bootmode[11]/GPMC_D[11] ) to 1, RSTOUT_WD_OUT  would always keep at high level. If I pulled this pin to 0, RSTOUT_WD_OUT worked as expected.

        I wonder that waht level of this pin shall I set to make RSTOUT_WD_OUT low and cold reset of system while WDT time out. Thanks.

     

    Regards,

        Eric