c6748 UPP + FPGA +AD to get sampled data !

Hong Wang,

The uPP peripheral doesn't support generating an interrupt event for each incoming sample; the best you can do is to use the "EOL" interrupts to approximate this behavior.  The DMA descriptors allow you to specify line size as small as 2 bytes, which would correspond to a single sample for 16-bit mode.  However, other customers have previously reported errors when using line size less than 4 bytes.  Please refer to this older thread:

• http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/33332.aspx

If you encounter this issue, then you may need to raise your line size to 4 bytes.  This would give you an interrupt every second sample in 16-bit mode.  Would this be acceptable, or is it a hard requirement to generate an interrupt every single sample?

(To be clear: I would encourage you to try 2 bytes per line, since that should be a valid configuration for uPP.  You would only need to move up to 4 bytes per line if 2 bytes per line generates an error.)

Hope this helps.

Joe Coombs:

          Thanks for your answer.

Now FPGA combines all 24 pieces of AD data to a 256 word package,and sends the package to DSP by uPP port.On the side of  C6748,I set the uPP register as:

  UPP->UPID0 = (uint32_t)&upp_data_recv;//;//add next DMA transfer
  UPP->UPID1 = 0x00020200;  //4 lines   512bytes per line
  UPP->UPID2 = 0x00000200; //line offset

The sampled data can be normally received by the c6748 , and in the EOL interrupt to process the  data, but there is always a mistake .we can see in the UPIER reg ,the DPEI bit=1,which means"Interrupt Status for Channel I Programming Error. Reports enabled interrupt status for programming error condition on DMA Channel I---Error occurred".

************************My first question****************************

When the UPIER.DPEI=1, in the main function ,"while(1){ //send data by ethernet port} " can't be entered.

When regs are set as below: 

UPP->UPID0 = (uint32_t)&upp_data_recv;//;//add next DMA transfer
  UPP->UPID1 = 0x00010200;  //4 lines   512bytes per line
  UPP->UPID2 = 0x00000200; //line offset

There is only one line in the window, c6748 uPP port works normal. UPIER.DPEI=0 always,and in the main function ,"while(1){ //send data by ethernet port}" work well.

************************My second question****************************

If I use one line mode ,the data transfer is not continuous,there has no enough time to process the data between two sample point(about 78.125us ,sample rate 12.8khz).

Is there any other way?

My code:

******************************initial uPP************************************************

void upp_set(uint16_t * recv_addr) //upp port set
{
 
 upp_config_t  upp_config;//init upp part use
//upp reg set
 upp_config.UPCTL.bits.IWA = 0x01; //interface wide of CHA = 16位数据总线
 upp_config.UPCTL.bits.DPWA = 0;    //设置CHA对齐模式
 upp_config.UPCTL.bits.CHN = 0;  //只使用一个通道CHA
 upp_config.UPCTL.bits.MODE = 0; //且这一个通道用来接收数据

 upp_config.UPCTL.bits.DRA = 0x01; //double data rate
 upp_config.UPCTL.bits.DDRDEMUX = 0;//Each peripheral channel is associated with its own DMA channel.

 upp_config.UPICR.bits.ENAA = 0x01;//使能CHA的ENABLE信号(接收模式)
 upp_config.UPICR.bits.STARTA = 0x01;//使能CHA的START信号(接收模式)
 
 upp_config.UPTCR.bits.RDSIZEI =  3;//Read threshold for DMA Channel I. Controls burst size for DMA Channel I.
             //0h-64B,1h-128B,2h-reserved,3h-256B

 upp_config.UPIES.bits.EOLI= 0x01; //turn on EOL(end of line) interrupt for CHA(DMA channel I)
// upp_config.UPIES.bits.EOWI= 0x01; //turn on EOW(end of window)interrupt for CHA(DMA channel I)

 upp_config.UPPCR.bits.EN = 0x01;  //Set the EN bit in the uPP peripheral control register (UPPCR) to 1 to turn on the uPP peripheral.
//upp DMA set
 //UPID0 set ---uPP DMA Channel I Descriptor 0 Register (UPID0)
 upp_config.UPID0 = (uint32_t) recv_addr;//recv_addr:UPP的DMA接受数据存放的地址
 upp_config.UPID1 = 0x00020200;  //4 lines 512 bytes per line  0x00030080;
 upp_config.UPID2 = 0x00000200;  //no offset between lines
  UPP_init(&upp_config);//初始化UPP口
}

*******************************************uPP interrupt ISR****************************************************************

interrupt void upp_isr(void)
{
 
 
  uint32_t i=0,j=0;
  UPISR_t interrupt_status;
    interrupt_status.value = UPP->UPIER;
 
  while (interrupt_status.value != 0)
  {
    if (interrupt_status.bits.EOLI)
    {
 //interrupt_status.bits.EOLI = 1; // clear EOLI
 UPP->UPIER |= ~(0x10);//clear EOLI bit in UPIER
     // Handle EOLI...
  Handle_upp_data(upp_data_recv);//--------------process the sampled data to package for ethernet sending
 }
    if (interrupt_status.bits.EOWI)
    {
//      interrupt_status.bits.EOWI = 1; // clear EOWI
     UPP->UPIER |= ~(0x08);//clear EOWI bit in UPIER
      // Handle EOWI...
    }
// if (interrupt_status.bits.DPEI)
//    {
//  //      interrupt_status.bits.DPEI = 1; // clear DPEI
//  UPP->UPIER = 0x01;//clear DPEI bit in UPIER
//  // Handle DPEI...
//    }
    // loop again if any interrupts are left
    interrupt_status.value = UPP->UPIER;
  } // end of while
  // write end of interrupt vector to allow future calls
  UPP->UPEOI = 0;
 //memset(upp_data_recv,0xFF,1024);
//   g_count.m_UppIntCount++;
//  if (g_count.m_UppIntCount>3)
//  {
//   g_count.m_UppIntCount=0;
//  }
  UPP->UPID0 = (uint32_t)&upp_data_recv;//[0+g_count.m_UppIntCount*256];//add next DMA transfer
  UPP->UPID1 = 0x00020200;  //4 lines 512bytes per line
  UPP->UPID2 = 0x00000200;

}

********************************* main.c*****************************************************

int main(void)
{
    uint32_t i=0,j=0,k=1;
    uint32_t test_cnt=0,rtn=0;
 uint32_t upp_dma_addr =0;
 for(j=0;j<1024;j++) upp_data_recv[j] = 0xeeee;
   //初始化
      
    upp_set(upp_data_recv);//UPP set;
   board_init();

    while(1)
 {
 if (g_flag.m_EthSendFlag)
  {
   eth_data_send();// send data by etherner 网口发送采样数据
  g_flag.m_EthSendFlag =0; //清除标记位
  }      
 }

Hong Wang,

It's strange that you see a DPEI error when you attempt to use 2 lines per window; that should be a perfectly valid configuration.  I think the problem is that you are attempting to re-program the DMA transfer every time you enter the ISR.  This will work fine for one line per transfer, but on the second line you are attempting to program a new transfer while one is already pending.  This will generate a DPEI event.

The easiest way to address this is to enable both EOWI and EOLI events, and only re-program the DMA when an EOWI event occurs.  You can use the PEND and ACT bits in UPIDS2 to make sure the uPP peripheral is ready for another transfer to be programmed.

Hope this helps.

Hi Hong,

I am having smililar kind of problem with my UPP when trying to get data from ADC.

Seems that You have done this, Can you help me with that or provide me your email address so I could discuss with you.

I look forward for your help.

Regards,

BAS