TDA4VM-Q1: How to set vlan?

xie jc

Expert 2450 points

Part Number: TDA4VM-Q1

Tool/software:

Dear TI's expert,

RTOS Version:SDK10.1

LINUX Version:SDK10.1

We need to use VLAN for our project, and currently it seems that only configuring gEthApp_vlanCfg is not enough. Can you show me what other configurations I need to make?

Regards.

over 1 year ago

0 Doredla Sudheer Kumar over 1 year ago

TI__Guru* 80400 points

Hi,

You need to create same VLAN on Linux client side using vconfig command.

Ex:

# vconfig add eth1 69

After vconfig, Linux client create VLAN Join request to ETHFW server.

After above you can communicate over VLAN.

Best Regards,
Sudheer

0 xie jc over 1 year ago in reply to Doredla Sudheer Kumar

Expert 2450 points

Hi Sudheer,

Based on your suggestion, I created a VLAN on the Linux side, but there are errors in the log of ethfw. Can you help me identify the problem?

...

Fullscreen ethfw error when vlen set.txt Download

root@j721e-evm:~# /opt/vx_app_arm_remote_log.out |grep MCU2_0
[MCU2_0]      5.020260 s: CIO: Init ... Done !!!
[MCU2_0]      5.020328 s: ### CPU Frequency = 1000000000 Hz
[MCU2_0]      5.020363 s: CPU is running FreeRTOS
[MCU2_0]      5.020385 s: APP: Init ... !!!
[MCU2_0]      5.020407 s: SCICLIENT: Init ... !!!
[MCU2_0]      5.020607 s: SCICLIENT: DMSC FW version [10.1.6--v10.01.06 (Fiery Fox)]
[MCU2_0]      5.020648 s: SCICLIENT: DMSC FW revision 0xa
[MCU2_0]      5.020674 s: SCICLIENT: DMSC FW ABI revision 4.0
[MCU2_0]      5.020698 s: SCICLIENT: Init ... Done !!!
[MCU2_0]      5.020721 s: UDMA: Init ... !!!
[MCU2_0]      5.021831 s: UDMA: Init ... Done !!!
[MCU2_0]      5.021885 s: MEM: Init ... !!!
[MCU2_0]      5.021919 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ f1200000 of size 2097152 bytes !!!
[MCU2_0]      5.021977 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!!
[MCU2_0]      5.022038 s: MEM: Created heap (DDR_CACHE_WT_MEM, id=7, flags=0x00000000) @ f1400000 of size 1048576 bytes !!!
[MCU2_0]      5.022090 s: MEM: Init ... Done !!!
[MCU2_0]      5.022112 s: ETHFW: Init ... !!!
[MCU2_0]      5.023067 s: ETHFW: Warning: Using 6 random MAC address(es)
[MCU2_0]      5.023331 s: EnetMcm: CPSW_9G on MAIN NAVSS
[MCU2_0]      5.032143 s: Mdio_open: MDIO manual mode enabled
[MCU2_0]      5.032211 s:
[MCU2_0]      5.034332 s: PHY 0 is alive
[MCU2_0]      5.035002 s: PHY 4 is alive
[MCU2_0]      5.039770 s: EnetPhy_bindDriver: PHY 4: OUI:006037 Model:10 Ver:02 <-> 'tja1101' : OK
[MCU2_0]      5.039826 s:
[MCU2_0]      5.040064 s: ETHFW: Shared multicasts:
[MCU2_0]      5.040130 s: ETHFW:   01:00:5e:00:00:01
[MCU2_0]      5.040168 s: ETHFW:   01:00:5e:00:00:fb
[MCU2_0]      5.040202 s: ETHFW:   01:00:5e:00:00:fc
[MCU2_0]      5.040231 s: ETHFW:   33:33:00:00:00:01
[MCU2_0]      5.040261 s: ETHFW:   33:33:ff:1d:92:c2
[MCU2_0]      5.040290 s: ETHFW:   01:80:c2:00:00:00
[MCU2_0]      5.040318 s: ETHFW:   01:80:c2:00:00:03
[MCU2_0]      5.040345 s: ETHFW: Reserved multicasts:
[MCU2_0]      5.040376 s: ETHFW:   01:80:c2:00:00:0e
[MCU2_0]      5.040406 s: ETHFW:   01:1b:19:00:00:00
[MCU2_0]      5.040454 s: ETHFW: CPSW recovery is not enabled
[MCU2_0]      5.041951 s: ETHFW: VLAN 1024 member=0x1ed virtMember=0x7 regMcastFlood=0x1ed unregMcastFlood=0x1ed untag=0x0
[MCU2_0]      5.042528 s: ETHFW: 1 VLAN entries added in ALE table
[MCU2_0]      5.042758 s:
[MCU2_0] ETHFW Version   : 0.05.00
[MCU2_0]      5.042812 s: ETHFW Build Date: Mar 20, 2025
[MCU2_0]      5.042840 s: ETHFW Build Time: 14:20:33
[MCU2_0]      5.042864 s: ETHFW Commit SHA: bef611b2
[MCU2_0]      5.042930 s: ETHFW: Init ... DONE !!!
[MCU2_0]      5.042962 s: IPC: Init ... !!!
[MCU2_0]      5.043017 s: IPC: 6 CPUs participating in IPC !!!
[MCU2_0]      5.043068 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_0]     11.297504 s: IPC: HLOS is ready !!!
[MCU2_0]     11.302170 s: IPC: Init ... Done !!!
[MCU2_0]     11.302238 s: APP: Syncing with 5 CPUs ... !!!
[MCU2_0]     11.321051 s: APP: Syncing with 5 CPUs ... Done !!!
[MCU2_0]     11.321191 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]     11.321535 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]     11.321592 s: ETHFW: Remove server Init ... !!!
[MCU2_0]     11.334744 s: ETHFW: Virtual port configuration:
[MCU2_0]     11.335320 s: ETHFW: CpswProxyServer: initialization completed (core: mcu2_0)
[MCU2_0]     11.335386 s: ETHFW: Remove server Init ... DONE !!!
[MCU2_0]     11.336206 s: Starting lwIP, local interface IP is dhcp-enabled
[MCU2_0]     11.343312 s: ETHFW: Host MAC address: 70:c9:2e:1a:05:3b
[MCU2_0]     11.346441 s: [LWIPIF_LWIP] Enet LLD netif initialized successfully
[MCU2_0]     11.353150 s: [LWIPIF_LWIP_IC] Interface started successfully
[MCU2_0]     11.353224 s: [LWIPIF_LWIP_IC] NETIF INIT SUCCESS
[MCU2_0]     11.359696 s: [LWIPIF_LWIP_IC] Interface started successfully
[MCU2_0]     11.359766 s: [LWIPIF_LWIP_IC] NETIF INIT SUCCESS
[MCU2_0]     11.359853 s: Added interface 'br3', IP is 0.0.0.0
[MCU2_0]     11.385054 s: FVID2: Init ... !!!
[MCU2_0]     11.385162 s: FVID2: Init ... Done !!!
[MCU2_0]     11.385210 s: DSS: Init ... !!!
[MCU2_0]     11.385236 s: DSS: Display type is eDP !!!
[MCU2_0]     11.385260 s: DSS: M2M Path is enabled !!!
[MCU2_0]     11.385283 s: DSS: SoC init ... !!!
[MCU2_0]     11.385302 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2
[MCU2_0]     11.385487 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     11.385523 s: SCICLIENT: Sciclient_pmSetModuleState module=297 state=2
[MCU2_0]     11.385679 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     11.385708 s: SCICLIENT: Sciclient_pmSetModuleState module=151 state=2
[MCU2_0]     11.385836 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     11.385865 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=9 parent=11
[MCU2_0]     11.385968 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]     11.386000 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=13 parent=18
[MCU2_0]     11.386209 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]     11.386262 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=1 parent=2
[MCU2_0]     11.386344 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]     11.386377 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk=1 freq=148500000
[MCU2_0]     11.387585 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU2_0]     11.387633 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk=1 state=2 flag=0
[MCU2_0]     11.387770 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU2_0]     11.387805 s: DSS: SoC init ... Done !!!
[MCU2_0]     11.387828 s: DSS: Board init ... !!!
[MCU2_0]     11.387848 s: DSS: Board init ... Done !!!
[MCU2_0]     11.406721 s: DSS: Init ... Done !!!
[MCU2_0]     11.406793 s: VHWA: VPAC Init ... !!!
[MCU2_0]     11.406819 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state=2
[MCU2_0]     11.407003 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     11.407178 s: VHWA: LDC Init ... !!!
[MCU2_0]     11.410469 s: VHWA: LDC Init ... Done !!!
[MCU2_0]     11.410538 s: VHWA: MSC Init ... !!!
[MCU2_0]     11.420859 s: VHWA: MSC Init ... Done !!!
[MCU2_0]     11.420931 s: VHWA: NF Init ... !!!
[MCU2_0]     11.422686 s: VHWA: NF Init ... Done !!!
[MCU2_0]     11.422750 s: VHWA: VISS Init ... !!!
[MCU2_0]     11.432898 s: VHWA: VISS Init ... Done !!!
[MCU2_0]     11.432975 s: VHWA: VPAC Init ... Done !!!
[MCU2_0]     11.433025 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_ERROR
[MCU2_0]     11.433198 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_WARNING
[MCU2_0]     11.433238 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_INFO
[MCU2_0]     11.434634 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.capture.scalar_sink on target MCU2-0
[MCU2_0]     11.434756 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.capture.scalar_source on target MCU2-0
[MCU2_0]     11.434836 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.capture.scalar_sink2 on target MCU2-0
[MCU2_0]     11.434911 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.capture.scalar_source2 on target MCU2-0
[MCU2_0]     11.434986 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.capture.scalar_intermediate on target MCU2-0
[MCU2_0]     11.435217 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.scalar_intermediate_2 on target MCU2-0
[MCU2_0]     11.435306 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.scalar_source_error on target MCU2-0
[MCU2_0]     11.435385 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.scalar_source_obj_array on target MCU2-0
[MCU2_0]     11.435461 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.scalar_sink_obj_array on target MCU2-0
[MCU2_0]     11.435536 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.pyramid_intermediate on target MCU2-0
[MCU2_0]     11.435609 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.pyramid_source on target MCU2-0
[MCU2_0]     11.435680 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.pyramid_sink on target MCU2-0
[MCU2_0]     11.435750 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.test_target on target MCU2-0
[MCU2_0]     11.435821 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.capture.image_intermediate on target MCU2-0
[MCU2_0]     11.435895 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.cmd_timeout_test on target MCU2-0
[MCU2_0]     11.435965 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.tiovx_overhead on target MCU2-0
[MCU2_0]     11.436330 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target MCU2-0
[MCU2_0]     11.436523 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target VPAC_NF
[MCU2_0]     11.436693 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target VPAC_LDC1
[MCU2_0]     11.436861 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target VPAC_MSC1
[MCU2_0]     11.437217 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target VPAC_MSC2
[MCU2_0]     11.437473 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target VPAC_VISS1
[MCU2_0]     11.437688 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE1
[MCU2_0]     11.437895 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE2
[MCU2_0]     11.438235 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE3
[MCU2_0]     11.438468 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE4
[MCU2_0]     11.438680 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE5
[MCU2_0]     11.438889 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE6
[MCU2_0]     11.439252 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE7
[MCU2_0]     11.439497 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE8
[MCU2_0]     11.439701 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target DISPLAY1
[MCU2_0]     11.439939 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target DISPLAY2
[MCU2_0]     11.440304 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CSITX
[MCU2_0]     11.440505 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target DSS_M2M1
[MCU2_0]     11.440686 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target DSS_M2M2
[MCU2_0]     11.440863 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target DSS_M2M3
[MCU2_0]     11.441245 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target DSS_M2M4
[MCU2_0]     11.441311 s:  VX_ZONE_INFO: [tivxInitLocal:126] Initialization Done !!!
[MCU2_0]     11.441352 s:  VX_ZONE_INFO: Globally Disabled VX_ZONE_INFO
[MCU2_0]     11.441381 s: APP: OpenVX Target kernel init ... !!!
[MCU2_0]     11.458771 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_0]     11.458841 s: CSI2RX: Init ... !!!
[MCU2_0]     11.458868 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2
[MCU2_0]     11.458985 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     11.459023 s: SCICLIENT: Sciclient_pmSetModuleState module=26 state=2
[MCU2_0]     11.459312 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     11.459350 s: SCICLIENT: Sciclient_pmSetModuleState module=27 state=2
[MCU2_0]     11.459462 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     11.459492 s: SCICLIENT: Sciclient_pmSetModuleState module=147 state=2
[MCU2_0]     11.459580 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     11.459610 s: SCICLIENT: Sciclient_pmSetModuleState module=148 state=2
[MCU2_0]     11.459689 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     11.459895 s: CSI2RX: Init ... Done !!!
[MCU2_0]     11.459934 s: CSI2TX: Init ... !!!
[MCU2_0]     11.459954 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2
[MCU2_0]     11.460163 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     11.460211 s: SCICLIENT: Sciclient_pmSetModuleState module=28 state=2
[MCU2_0]     11.460316 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     11.460348 s: SCICLIENT: Sciclient_pmSetModuleState module=296 state=2
[MCU2_0]     11.460451 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     11.460545 s: CSI2TX: Init ... Done !!!
[MCU2_0]     11.460579 s: ISS: Init ... !!!
[MCU2_0]     11.460620 s: IssSensor_Init ... Done !!!
[MCU2_0]     11.460698 s: IttRemoteServer_Init ... Done !!!
[MCU2_0]     11.460729 s: ISS: Init ... Done !!!
[MCU2_0]     11.460754 s: VISS REMOTE SERVICE: Init ... !!!
[MCU2_0]     11.460816 s: VISS REMOTE SERVICE: Init ... Done !!!
[MCU2_0]     11.460850 s: UDMA Copy: Init ... !!!
[MCU2_0]     11.462564 s: UDMA Copy: Init ... Done !!!
[MCU2_0]     11.462631 s: APP: Init ... Done !!!
[MCU2_0]     11.462659 s: APP: Run ... !!!
[MCU2_0]     11.462684 s: IPC: Starting echo test ...
[MCU2_0]     11.462949 s: APP: Run ... Done !!!
[MCU2_0]     11.463407 s: Cpsw_handleLinkUp: Port 1: Link up: 100-Mbps Full-Duplex
[MCU2_0]     11.463468 s:
[MCU2_0]     11.464947 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[.] C66X_2[.] C7X_1[.]
[MCU2_0]     11.465189 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[.] C66X_2[P] C7X_1[.]
[MCU2_0]     11.465283 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[.] C66X_2[P] C7X_1[P]
[MCU2_0]     11.465354 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[P]
[MCU2_0]     12.065476 s: ETHFW: VIRT_PORT_INFO | C2S | core=0 endpt=1026
[MCU2_0]     12.065546 s: ETHFW: VIRT_PORT_INFO | S2C | switchPortMask=1 macPortMask=0
[MCU2_0]     12.065799 s: ETHFW: ATTACH | C2S | core=0 endpt=1026 virtPort=0
[MCU2_0]     12.065959 s: ETHFW: ATTACH | S2C | token=0 rxMtu=1522 features=3
[MCU2_0]     12.066242 s: ETHFW: ALLOC_RX | C2S | core=0 endpt=1026 token=0
[MCU2_0]     12.066348 s: ETHFW: ALLOC_RX | S2C | flow=172,0 rxPsil=0x4a00 status=0
[MCU2_0]     12.066532 s: ETHFW: ALLOC_TX | C2S | core=0 endpt=1026 token=0
[MCU2_0]     12.066611 s: ETHFW: ALLOC_TX | S2C | txPsil=0xca04 status=0
[MCU2_0]     12.068224 s: ETHFW: ALLOC_TX | C2S | core=0 endpt=1026 token=0
[MCU2_0]     12.068309 s: ETHFW: ALLOC_TX | S2C | txPsil=0xca07 status=0
[MCU2_0]     12.069172 s: ETHFW: ALLOC_MAC | C2S | core=0 endpt=1026 token=0
[MCU2_0]     12.069262 s: ETHFW: ALLOC_MAC | S2C | macAddr=70:73:d7:f5:9a:c3 status=0
[MCU2_0]     12.144356 s: ETHFW: REGISTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=70:73:d7:f5:9a:c3 flowIdx=172,0
[MCU2_0]     12.147564 s: Cpsw_ioctlInternal: Registered MAC address (ALE entry=7, policer entry=1)
[MCU2_0]     12.147627 s:
[MCU2_0]     12.147665 s: ETHFW: REGISTER_MAC | S2C | status=0
[MCU2_0]     12.147889 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=33:33:00:00:00:01 vlanId=65535 flowIdx=172,0
[MCU2_0]     12.149613 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     12.149808 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:00:5e:00:00:01 vlanId=65535 flowIdx=172,0
[MCU2_0]     12.151506 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     12.151669 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:80:c2:00:00:00 vlanId=65535 flowIdx=172,0
[MCU2_0]     12.153359 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     12.153524 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:80:c2:00:00:03 vlanId=65535 flowIdx=172,0
[MCU2_0]     12.155205 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     12.155367 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:80:c2:00:00:0e vlanId=65535 flowIdx=172,0
[MCU2_0]     12.155452 s: ETHFW: EthFwMcast_filterAddMac: Failed to add reserved mcast addr on vlan 0 and hwVlanId 3 01:80:c2:00:00:0e: -2
[MCU2_0]     12.155508 s: ETHFW: CpswProxyServer_filterAddMacHandlerCb: Failed to add multicast: -2
[MCU2_0]     12.155551 s: ETHFW: CpswProxyServer_clientRequestHandler: Failed to add mcast to filter: -2
[MCU2_0]     12.155597 s: ETHFW: ADD_FILTER_MAC | S2C | status=-2
[MCU2_0]     12.155743 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=33:33:ff:f5:9a:c3 vlanId=65535 flowIdx=172,0
[MCU2_0]     12.159126 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     21.462052 s: -----------------MCU2_0 is running...
[MCU2_0]     31.462055 s: -----------------MCU2_0 is running...
[MCU2_0]     37.094930 s: ETHFW: JOIN_VLAN | C2S | core=0 endpt=1026 token=0 vlanId=69 macAdd=70:73:d7:f5:9a:c3 flowIdx=172,0
[MCU2_0]     37.095677 s: ETHFW: JOIN_VLAN | S2C | status=0
[MCU2_0]     37.095882 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:80:c2:00:00:21 vlanId=65535 flowIdx=172,0
[MCU2_0]     37.099197 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     37.099433 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=33:33:00:00:00:01 vlanId=69 flowIdx=172,0
[MCU2_0]     37.099520 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     37.111125 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:00:5e:00:00:01 vlanId=69 flowIdx=172,0
[MCU2_0]     37.111235 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     37.111389 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=33:33:ff:f5:9a:c3 vlanId=69 flowIdx=172,0
[MCU2_0]     37.111509 s: ETHFW: EthFwMcast_filterAddMacExcl: Exclusive mcast already owned by another client: -10
[MCU2_0]     37.111567 s: ETHFW: EthFwMcast_filterAddMac: Failed to add exclusive mcast address: -10
[MCU2_0]     37.111624 s: ETHFW: EthFwMcast_filterAddMac: Failed to add mcast addr on vlan 69 and hwVlanId 69 33:33:ff:f5:9a:c3: -10

Regards.

0 Doredla Sudheer Kumar over 1 year ago in reply to xie jc

TI__Guru* 80400 points

Hi,

Can you please integrate the patch shared below FAQ, and check once.
e2e.ti.com/.../faq-tda4vm-error-while-registration-of-same-mac-address-with-different-vlan-to-ethfw-server-from-client

Best Regards,
Sudheer

0 xie jc over 1 year ago in reply to Doredla Sudheer Kumar

Expert 2450 points

Hi Sudheer,

I think your patch has some effect because ethfw still has some errors. Can you help me determine if there are any other patches that need to be applied?

Fullscreen ethfw error when vlen set_v2.txt Download

root@j721e-evm:~# /opt/vx_app_arm_remote_log.out |grep MCU2_0
[MCU2_0]      5.020145 s: CIO: Init ... Done !!!
[MCU2_0]      5.020211 s: ### CPU Frequency = 1000000000 Hz
[MCU2_0]      5.020244 s: CPU is running FreeRTOS
[MCU2_0]      5.020264 s: APP: Init ... !!!
[MCU2_0]      5.020284 s: SCICLIENT: Init ... !!!
[MCU2_0]      5.020489 s: SCICLIENT: DMSC FW version [10.1.6--v10.01.06 (Fiery Fox)]
[MCU2_0]      5.020536 s: SCICLIENT: DMSC FW revision 0xa
[MCU2_0]      5.020561 s: SCICLIENT: DMSC FW ABI revision 4.0
[MCU2_0]      5.020588 s: SCICLIENT: Init ... Done !!!
[MCU2_0]      5.020610 s: UDMA: Init ... !!!
[MCU2_0]      5.021718 s: UDMA: Init ... Done !!!
[MCU2_0]      5.021778 s: MEM: Init ... !!!
[MCU2_0]      5.021815 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ f1200000 of size 2097152 bytes !!!
[MCU2_0]      5.021872 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!!
[MCU2_0]      5.021931 s: MEM: Created heap (DDR_CACHE_WT_MEM, id=7, flags=0x00000000) @ f1400000 of size 1048576 bytes !!!
[MCU2_0]      5.021983 s: MEM: Init ... Done !!!
[MCU2_0]      5.022004 s: ETHFW: Init ... !!!
[MCU2_0]      5.022979 s: ETHFW: Warning: Using 6 random MAC address(es)
[MCU2_0]      5.023253 s: EnetMcm: CPSW_9G on MAIN NAVSS
[MCU2_0]      5.032082 s: Mdio_open: MDIO manual mode enabled
[MCU2_0]      5.032152 s:
[MCU2_0]      5.034304 s: PHY 0 is alive
[MCU2_0]      5.034988 s: PHY 4 is alive
[MCU2_0]      5.039755 s: EnetPhy_bindDriver: PHY 4: OUI:006037 Model:10 Ver:02 <-> 'tja1101' : OK
[MCU2_0]      5.039816 s:
[MCU2_0]      5.040061 s: ETHFW: Shared multicasts:
[MCU2_0]      5.040127 s: ETHFW:   01:00:5e:00:00:01
[MCU2_0]      5.040163 s: ETHFW:   01:00:5e:00:00:fb
[MCU2_0]      5.040195 s: ETHFW:   01:00:5e:00:00:fc
[MCU2_0]      5.040225 s: ETHFW:   33:33:00:00:00:01
[MCU2_0]      5.040256 s: ETHFW:   33:33:ff:1d:92:c2
[MCU2_0]      5.040286 s: ETHFW:   01:80:c2:00:00:00
[MCU2_0]      5.040316 s: ETHFW:   01:80:c2:00:00:03
[MCU2_0]      5.040344 s: ETHFW: Reserved multicasts:
[MCU2_0]      5.040376 s: ETHFW:   01:80:c2:00:00:0e
[MCU2_0]      5.040407 s: ETHFW:   01:1b:19:00:00:00
[MCU2_0]      5.040459 s: ETHFW: CPSW recovery is not enabled
[MCU2_0]      5.041959 s: ETHFW: VLAN 1024 member=0x1ed virtMember=0x7 regMcastFlood=0x1ed unregMcastFlood=0x1ed untag=0x0
[MCU2_0]      5.042535 s: ETHFW: 1 VLAN entries added in ALE table
[MCU2_0]      5.042774 s:
[MCU2_0] ETHFW Version   : 0.05.00
[MCU2_0]      5.042826 s: ETHFW Build Date: Mar 25, 2025
[MCU2_0]      5.042853 s: ETHFW Build Time: 20:41:59
[MCU2_0]      5.042877 s: ETHFW Commit SHA: ebef4a17
[MCU2_0]      5.042948 s: ETHFW: Init ... DONE !!!
[MCU2_0]      5.042983 s: IPC: Init ... !!!
[MCU2_0]      5.043041 s: IPC: 6 CPUs participating in IPC !!!
[MCU2_0]      5.043087 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_0]     12.692736 s: IPC: HLOS is ready !!!
[MCU2_0]     12.697267 s: IPC: Init ... Done !!!
[MCU2_0]     12.697337 s: APP: Syncing with 5 CPUs ... !!!
[MCU2_0]     12.709318 s: APP: Syncing with 5 CPUs ... Done !!!
[MCU2_0]     12.709372 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]     12.709809 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]     12.709875 s: ETHFW: Remove server Init ... !!!
[MCU2_0]     12.725301 s: ETHFW: Virtual port configuration:
[MCU2_0]     12.725866 s: ETHFW: CpswProxyServer: initialization completed (core: mcu2_0)
[MCU2_0]     12.725947 s: ETHFW: Remove server Init ... DONE !!!
[MCU2_0]     12.726818 s: Starting lwIP, local interface IP is dhcp-enabled
[MCU2_0]     12.733528 s: ETHFW: Host MAC address: 70:ae:3c:07:f5:72
[MCU2_0]     12.736690 s: [LWIPIF_LWIP] Enet LLD netif initialized successfully
[MCU2_0]     12.743684 s: [LWIPIF_LWIP_IC] Interface started successfully
[MCU2_0]     12.743768 s: [LWIPIF_LWIP_IC] NETIF INIT SUCCESS
[MCU2_0]     12.750320 s: [LWIPIF_LWIP_IC] Interface started successfully
[MCU2_0]     12.750397 s: [LWIPIF_LWIP_IC] NETIF INIT SUCCESS
[MCU2_0]     12.750483 s: Added interface 'br3', IP is 0.0.0.0
[MCU2_0]     12.775931 s: FVID2: Init ... !!!
[MCU2_0]     12.776044 s: FVID2: Init ... Done !!!
[MCU2_0]     12.776091 s: DSS: Init ... !!!
[MCU2_0]     12.776117 s: DSS: Display type is eDP !!!
[MCU2_0]     12.776141 s: DSS: M2M Path is enabled !!!
[MCU2_0]     12.776163 s: DSS: SoC init ... !!!
[MCU2_0]     12.776182 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2
[MCU2_0]     12.776365 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     12.776401 s: SCICLIENT: Sciclient_pmSetModuleState module=297 state=2
[MCU2_0]     12.776553 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     12.776585 s: SCICLIENT: Sciclient_pmSetModuleState module=151 state=2
[MCU2_0]     12.776702 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     12.776731 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=9 parent=11
[MCU2_0]     12.776833 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]     12.776864 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=13 parent=18
[MCU2_0]     12.777081 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]     12.777134 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=1 parent=2
[MCU2_0]     12.777221 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]     12.777255 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk=1 freq=148500000
[MCU2_0]     12.778439 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU2_0]     12.778488 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk=1 state=2 flag=0
[MCU2_0]     12.778626 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU2_0]     12.778657 s: DSS: SoC init ... Done !!!
[MCU2_0]     12.778679 s: DSS: Board init ... !!!
[MCU2_0]     12.778699 s: DSS: Board init ... Done !!!
[MCU2_0]     12.797544 s: DSS: Init ... Done !!!
[MCU2_0]     12.797613 s: VHWA: VPAC Init ... !!!
[MCU2_0]     12.797643 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state=2
[MCU2_0]     12.797818 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     12.797856 s: VHWA: LDC Init ... !!!
[MCU2_0]     12.801232 s: VHWA: LDC Init ... Done !!!
[MCU2_0]     12.801301 s: VHWA: MSC Init ... !!!
[MCU2_0]     12.811590 s: VHWA: MSC Init ... Done !!!
[MCU2_0]     12.811654 s: VHWA: NF Init ... !!!
[MCU2_0]     12.813363 s: VHWA: NF Init ... Done !!!
[MCU2_0]     12.813432 s: VHWA: VISS Init ... !!!
[MCU2_0]     12.823487 s: VHWA: VISS Init ... Done !!!
[MCU2_0]     12.823556 s: VHWA: VPAC Init ... Done !!!
[MCU2_0]     12.823602 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_ERROR
[MCU2_0]     12.823636 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_WARNING
[MCU2_0]     12.823668 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_INFO
[MCU2_0]     12.825180 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.capture.scalar_sink on target MCU2-0
[MCU2_0]     12.825301 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.capture.scalar_source on target MCU2-0
[MCU2_0]     12.825383 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.capture.scalar_sink2 on target MCU2-0
[MCU2_0]     12.825459 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.capture.scalar_source2 on target MCU2-0
[MCU2_0]     12.825534 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.capture.scalar_intermediate on target MCU2-0
[MCU2_0]     12.825610 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.scalar_intermediate_2 on target MCU2-0
[MCU2_0]     12.825688 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.scalar_source_error on target MCU2-0
[MCU2_0]     12.825762 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.scalar_source_obj_array on target MCU2-0
[MCU2_0]     12.825836 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.scalar_sink_obj_array on target MCU2-0
[MCU2_0]     12.826048 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.pyramid_intermediate on target MCU2-0
[MCU2_0]     12.826156 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.pyramid_source on target MCU2-0
[MCU2_0]     12.826242 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.pyramid_sink on target MCU2-0
[MCU2_0]     12.826322 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.test_target on target MCU2-0
[MCU2_0]     12.826397 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.capture.image_intermediate on target MCU2-0
[MCU2_0]     12.826474 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.cmd_timeout_test on target MCU2-0
[MCU2_0]     12.826551 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:162] registered kernel com.ti.test_kernels.tiovx_overhead on target MCU2-0
[MCU2_0]     12.826767 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target MCU2-0
[MCU2_0]     12.827100 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target VPAC_NF
[MCU2_0]     12.827299 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target VPAC_LDC1
[MCU2_0]     12.827472 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target VPAC_MSC1
[MCU2_0]     12.827638 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target VPAC_MSC2
[MCU2_0]     12.827861 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target VPAC_VISS1
[MCU2_0]     12.828225 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE1
[MCU2_0]     12.828442 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE2
[MCU2_0]     12.828651 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE3
[MCU2_0]     12.828861 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE4
[MCU2_0]     12.829238 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE5
[MCU2_0]     12.829460 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE6
[MCU2_0]     12.829660 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE7
[MCU2_0]     12.829859 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CAPTURE8
[MCU2_0]     12.830218 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target DISPLAY1
[MCU2_0]     12.830445 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target DISPLAY2
[MCU2_0]     12.830627 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target CSITX
[MCU2_0]     12.830870 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target DSS_M2M1
[MCU2_0]     12.831269 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target DSS_M2M2
[MCU2_0]     12.831463 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target DSS_M2M3
[MCU2_0]     12.831635 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:134] Added target DSS_M2M4
[MCU2_0]     12.831691 s:  VX_ZONE_INFO: [tivxInitLocal:126] Initialization Done !!!
[MCU2_0]     12.831729 s:  VX_ZONE_INFO: Globally Disabled VX_ZONE_INFO
[MCU2_0]     12.831755 s: APP: OpenVX Target kernel init ... !!!
[MCU2_0]     12.849099 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_0]     12.849173 s: CSI2RX: Init ... !!!
[MCU2_0]     12.849203 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2
[MCU2_0]     12.849325 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     12.849360 s: SCICLIENT: Sciclient_pmSetModuleState module=26 state=2
[MCU2_0]     12.849495 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     12.849525 s: SCICLIENT: Sciclient_pmSetModuleState module=27 state=2
[MCU2_0]     12.849637 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     12.849666 s: SCICLIENT: Sciclient_pmSetModuleState module=147 state=2
[MCU2_0]     12.849758 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     12.849786 s: SCICLIENT: Sciclient_pmSetModuleState module=148 state=2
[MCU2_0]     12.849871 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     12.850205 s: CSI2RX: Init ... Done !!!
[MCU2_0]     12.850257 s: CSI2TX: Init ... !!!
[MCU2_0]     12.850282 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2
[MCU2_0]     12.850373 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     12.850411 s: SCICLIENT: Sciclient_pmSetModuleState module=28 state=2
[MCU2_0]     12.850516 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     12.850546 s: SCICLIENT: Sciclient_pmSetModuleState module=296 state=2
[MCU2_0]     12.850640 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     12.850719 s: CSI2TX: Init ... Done !!!
[MCU2_0]     12.850749 s: ISS: Init ... !!!
[MCU2_0]     12.850788 s: IssSensor_Init ... Done !!!
[MCU2_0]     12.850870 s: IttRemoteServer_Init ... Done !!!
[MCU2_0]     12.851041 s: ISS: Init ... Done !!!
[MCU2_0]     12.851093 s: VISS REMOTE SERVICE: Init ... !!!
[MCU2_0]     12.851178 s: VISS REMOTE SERVICE: Init ... Done !!!
[MCU2_0]     12.851214 s: UDMA Copy: Init ... !!!
[MCU2_0]     12.853036 s: UDMA Copy: Init ... Done !!!
[MCU2_0]     12.853107 s: APP: Init ... Done !!!
[MCU2_0]     12.853140 s: APP: Run ... !!!
[MCU2_0]     12.853162 s: IPC: Starting echo test ...
[MCU2_0]     12.853420 s: APP: Run ... Done !!!
[MCU2_0]     12.853779 s: Cpsw_handleLinkUp: Port 1: Link up: 100-Mbps Full-Duplex
[MCU2_0]     12.853840 s:
[MCU2_0]     12.855424 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[.] C7X_1[.]
[MCU2_0]     12.855528 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[.] C7X_1[.]
[MCU2_0]     12.855608 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[.]
[MCU2_0]     12.855684 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[P]
[MCU2_0]     13.613081 s: ETHFW: VIRT_PORT_INFO | C2S | core=0 endpt=1026
[MCU2_0]     13.613155 s: ETHFW: VIRT_PORT_INFO | S2C | switchPortMask=1 macPortMask=0
[MCU2_0]     13.613337 s: ETHFW: ATTACH | C2S | core=0 endpt=1026 virtPort=0
[MCU2_0]     13.613501 s: ETHFW: ATTACH | S2C | token=0 rxMtu=1522 features=3
[MCU2_0]     13.613638 s: ETHFW: ALLOC_RX | C2S | core=0 endpt=1026 token=0
[MCU2_0]     13.613733 s: ETHFW: ALLOC_RX | S2C | flow=172,0 rxPsil=0x4a00 status=0
[MCU2_0]     13.613868 s: ETHFW: ALLOC_TX | C2S | core=0 endpt=1026 token=0
[MCU2_0]     13.614117 s: ETHFW: ALLOC_TX | S2C | txPsil=0xca04 status=0
[MCU2_0]     13.614291 s: ETHFW: ALLOC_TX | C2S | core=0 endpt=1026 token=0
[MCU2_0]     13.614370 s: ETHFW: ALLOC_TX | S2C | txPsil=0xca07 status=0
[MCU2_0]     13.614498 s: ETHFW: ALLOC_MAC | C2S | core=0 endpt=1026 token=0
[MCU2_0]     13.614579 s: ETHFW: ALLOC_MAC | S2C | macAddr=70:9b:19:e0:f4:df status=0
[MCU2_0]     13.774582 s: ETHFW: REGISTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=70:9b:19:e0:f4:df flowIdx=172,0
[MCU2_0]     13.777793 s: Cpsw_ioctlInternal: Registered MAC address (ALE entry=7, policer entry=1)
[MCU2_0]     13.777861 s:
[MCU2_0]     13.778005 s: ETHFW: REGISTER_MAC | S2C | status=0
[MCU2_0]     13.778842 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=33:33:00:00:00:01 vlanId=65535 flowIdx=172,0
[MCU2_0]     13.780581 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     13.780806 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:00:5e:00:00:01 vlanId=65535 flowIdx=172,0
[MCU2_0]     13.782537 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     13.782722 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:80:c2:00:00:00 vlanId=65535 flowIdx=172,0
[MCU2_0]     13.784428 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     13.784604 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:80:c2:00:00:03 vlanId=65535 flowIdx=172,0
[MCU2_0]     13.786310 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     13.786479 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:80:c2:00:00:0e vlanId=65535 flowIdx=172,0
[MCU2_0]     13.786567 s: ETHFW: EthFwMcast_filterAddMac: Failed to add reserved mcast addr on vlan 0 and hwVlanId 3 01:80:c2:00:00:0e: -2
[MCU2_0]     13.786632 s: ETHFW: CpswProxyServer_filterAddMacHandlerCb: Failed to add multicast: -2
[MCU2_0]     13.786679 s: ETHFW: CpswProxyServer_clientRequestHandler: Failed to add mcast to filter: -2
[MCU2_0]     13.786725 s: ETHFW: ADD_FILTER_MAC | S2C | status=-2
[MCU2_0]     13.786866 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=33:33:ff:e0:f4:df vlanId=65535 flowIdx=172,0
[MCU2_0]     13.790186 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     22.852931 s: -----------------MCU2_0 is running...
[MCU2_0]     28.412087 s: ETHFW: JOIN_VLAN | C2S | core=0 endpt=1026 token=0 vlanId=69 macAdd=70:9b:19:e0:f4:df flowIdx=172,0
[MCU2_0]     28.412706 s: ETHFW: JOIN_VLAN | S2C | status=0
[MCU2_0]     28.412898 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:80:c2:00:00:21 vlanId=65535 flowIdx=172,0
[MCU2_0]     28.416373 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     28.416602 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=33:33:00:00:00:01 vlanId=69 flowIdx=172,0
[MCU2_0]     28.416691 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     28.427467 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:00:5e:00:00:01 vlanId=69 flowIdx=172,0
[MCU2_0]     28.427563 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     28.427722 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:80:c2:00:00:00 vlanId=69 flowIdx=172,0
[MCU2_0]     28.427809 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     28.428465 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:80:c2:00:00:03 vlanId=69 flowIdx=172,0
[MCU2_0]     28.428553 s: ETHFW: ADD_FILTER_MAC | S2C | status=0
[MCU2_0]     28.428702 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:80:c2:00:00:0e vlanId=69 flowIdx=172,0
[MCU2_0]     28.432101 s: ETHFW: ADD_FILTER_MAC | S2C | status=0

Regards.

0 Doredla Sudheer Kumar over 1 year ago in reply to xie jc

TI__Guru* 80400 points

Hi,

Above MAC address (01:80:c2:00:00:0e) is gPTP reserved MAC address can't be registered by any client, only ETHFW handled the gPTP tarffic.

Refer to "gEthApp_rsvdMcastCfgTable" in ETHFW server application for the reserved Multicast addresses.

I think using above patch, VLAN issue will be resolved and you can able to communicate over VLAN.

Best Regards,
Sudheer

0 xie jc over 1 year ago in reply to Doredla Sudheer Kumar

Expert 2450 points

Hi Sudheer,

Doredla Sudheer Kumar said:
Above MAC address (01:80:c2:00:00:0e) is gPTP reserved MAC address can't be registered by any client, only ETHFW handled the gPTP tarffic.

Are you mean that the error here will not affect the use of VLAN?

Doredla Sudheer Kumar said:
I think using above patch, VLAN issue will be resolved and you can able to communicate over VLAN.

Unfortunately, I am still unable to use VLAN. I applied the patch by hand edit because there is not a 01001_user_guide.md file in my local code and I can't execute 'git am patch' successfully.I also check my PC environment and it can communicate over VLAN on SDK8.4,

What could possibly be the reason?

Fullscreen Registration_of_same_MAC_from_same_client_by_hand_edit.txt Download

From 2e32740499ec5d41daba988e6f4fec36fa866dcf Mon Sep 17 00:00:00 2001
From: zhangweizhen <zhangweizhen@mit.cn>
Date: Wed, 26 Mar 2025 19:45:38 +0800
Subject: [PATCH] Registration_of_same_MAC_from_same_client_by_hand_edit

Change-Id: I72e6eeeddcd5ac61272cd38fe46ba2684f18dffc
---
 .../apps/app_remoteswitchcfg_server/main.c    |   2 +-
 .../ethremotecfg/server/include/ethfw_mcast.h |   3 +
 .../ethremotecfg/server/src/ethfw_mcast.c     | 144 +++++++++++++++++-
 3 files changed, 142 insertions(+), 7 deletions(-)

diff --git a/psdkra/ethfw/apps/app_remoteswitchcfg_server/main.c b/psdkra/ethfw/apps/app_remoteswitchcfg_server/main.c
index 00faf3996..77c83153f 100644
--- a/psdkra/ethfw/apps/app_remoteswitchcfg_server/main.c
+++ b/psdkra/ethfw/apps/app_remoteswitchcfg_server/main.c
@@ -785,7 +785,7 @@ static EthFwVirtPort_VirtPortCfg gEthApp_virtPortCfg[] =
 static EthFwVlan_VlanCfg gEthApp_vlanCfg[] =
 {
     {
-        .vlanId              = 1024U,
+        .vlanId              = 69U,
         .memberMask          = ETHAPP_DFLT_PORT_MASK,
         .regMcastFloodMask   = ETHAPP_DFLT_PORT_MASK,
         .unregMcastFloodMask = ETHAPP_DFLT_PORT_MASK,
diff --git a/psdkra/ethfw/ethremotecfg/server/include/ethfw_mcast.h b/psdkra/ethfw/ethremotecfg/server/include/ethfw_mcast.h
index b9291008c..75e909e91 100644
--- a/psdkra/ethfw/ethremotecfg/server/include/ethfw_mcast.h
+++ b/psdkra/ethfw/ethremotecfg/server/include/ethfw_mcast.h
@@ -67,6 +67,9 @@ extern "C" {
 /*! Size of reserved multicast address table */
 #define ETHFW_RSVD_MCAST_LIST_LEN         (4U)
 
+/*! Size of Exclusive multicast address table */
+#define ETHFW_EXCLUSIVE_MCAST_LIST_LEN       (32U)
+
 /* ========================================================================== */
 /*                         Structures and Enums                               */
 /* ========================================================================== */
diff --git a/psdkra/ethfw/ethremotecfg/server/src/ethfw_mcast.c b/psdkra/ethfw/ethremotecfg/server/src/ethfw_mcast.c
index 0ec9fd5c9..6396a33a0 100644
--- a/psdkra/ethfw/ethremotecfg/server/src/ethfw_mcast.c
+++ b/psdkra/ethfw/ethremotecfg/server/src/ethfw_mcast.c
@@ -92,6 +92,29 @@ typedef struct EthFwMcast_SharedMcastTable_s
     uint32_t len;
 } EthFwMcast_SharedMcastTable;
 
+/* Exclusive multicast info */
+typedef struct EthFwMcast_ExclusiveMcastInfo_s
+{
+    /* Multicast address */
+    uint8_t macAddr[ENET_MAC_ADDR_LEN];
+
+    /* Virtual port */
+    uint32_t virtPort;
+
+    /* Reference count */
+    uint32_t refCnt;
+
+    /* Whether this entry is free or not */
+    bool isFree;
+} EthFwMcast_ExclusiveMcastInfo;
+
+/* Exclusive multicast table */
+typedef struct EthFwMcast_ExclusiveMcastTable_s
+{
+    /* Exclusive multicast info table */
+    EthFwMcast_ExclusiveMcastInfo table[ETHFW_EXCLUSIVE_MCAST_LIST_LEN];
+} EthFwMcast_ExclusiveMcastTable;
+
 /* Reserved multicast table */
 typedef struct EthFwMcast_RsvdMcastTable_s
 {
@@ -111,6 +134,9 @@ typedef struct EthFwMcast_Obj_s
     /* Reserved multicast table */
     EthFwMcast_RsvdMcastTable rsvdMcastTable;
 
+    /* Exclusive multicast table */
+    EthFwMcast_ExclusiveMcastTable exclusiveMcastTable;
+
     /* Callback to notify addition of mcast address to filter */
     EthFwMcast_FilterAddMacSharedCb filterAddMacSharedCb;
 
@@ -159,6 +185,9 @@ static int32_t EthFwMcast_filterDelMacExcl(EthRemoteCfg_VirtPort virtPort,
                                            Enet_Handle hEnet,
                                            const uint8_t *macAddr);
 
+static EthFwMcast_ExclusiveMcastInfo *EthFwMcast_getExclusiveMcastInfo(const uint8_t *macAddr,
+                                                                       uint16_t vlanId);
+
 /* ========================================================================== */
 /*                            Global Variables                                */
 /* ========================================================================== */
@@ -175,6 +204,7 @@ int32_t EthFwMcast_init(const EthFwMcast_Cfg *cfg,
                         uint32_t macOnlyPortMask)
 {
     int32_t status = ETHFW_EFAIL;
+    uint32_t i = 0U;
 
     memset(&gEthFwMcastObj, 0, sizeof(gEthFwMcastObj));
 
@@ -195,6 +225,11 @@ int32_t EthFwMcast_init(const EthFwMcast_Cfg *cfg,
         gEthFwMcastObj.macOnlyPortMask = macOnlyPortMask;
     }
 
+    for (i = 0U; i < ETHFW_EXCLUSIVE_MCAST_LIST_LEN; i++)
+    {
+        gEthFwMcastObj.exclusiveMcastTable.table[i].isFree = BTRUE;
+    }
+
     return status;
 }
 
@@ -212,6 +247,7 @@ int32_t EthFwMcast_filterAddMac(EthRemoteCfg_VirtPort virtPort,
                                 uint8_t hostId)
 {
     EthFwMcast_SharedMcastInfo *mcastInfo;
+    EthFwMcast_ExclusiveMcastInfo *exclusiveMcastInfo;
 #if defined(ETHFW_VEPA_SUPPORT)
     struct eth_addr hwAddr;
 #endif
@@ -241,8 +277,26 @@ int32_t EthFwMcast_filterAddMac(EthRemoteCfg_VirtPort virtPort,
         }
         else
         {
-            status = EthFwMcast_filterAddMacExcl(virtPort, hEnet, macAddr, flowIdxOffset);
-            ETHFWTRACE_ERR_IF((status != ETHFW_SOK), status, "Failed to add exclusive mcast address");
+            exclusiveMcastInfo = EthFwMcast_getExclusiveMcastInfo(macAddr, vlanId);
+            /* Some virtual port has registered with this exclusive multicast address */
+            if (exclusiveMcastInfo != NULL)
+            {
+                if (exclusiveMcastInfo->virtPort == virtPort)
+                {
+                    exclusiveMcastInfo->refCnt++;
+                }
+                /* Exclusive multicast already registered by other client */
+                else
+                {
+                    status = ETHFW_EFAIL;
+                    ETHFWTRACE_ERR(status, "Exclusive multicast already registered by other client");
+                }
+            }
+            else
+            {
+                status = EthFwMcast_filterAddMacExcl(virtPort, hEnet, macAddr, flowIdxOffset);
+                ETHFWTRACE_ERR_IF((status != ETHFW_SOK), status, "Failed to add exclusive mcast address");
+            }
         }
     }
     else
@@ -269,6 +323,7 @@ int32_t EthFwMcast_filterDelMac(EthRemoteCfg_VirtPort virtPort,
                                 uint8_t hostId)
 {
     EthFwMcast_SharedMcastInfo *mcastInfo;
+    EthFwMcast_ExclusiveMcastInfo *exclusiveMcastInfo;
 #if defined(ETHFW_VEPA_SUPPORT)
     struct eth_addr hwAddr;
 #endif
@@ -299,9 +354,42 @@ int32_t EthFwMcast_filterDelMac(EthRemoteCfg_VirtPort virtPort,
         }
         else
         {
-            status = EthFwMcast_filterDelMacExcl(virtPort, hEnet, macAddr);
-            ETHFWTRACE_ERR_IF((status != ETHFW_SOK), status,
-                               "Failed to delete exclusive mcast address");
+            exclusiveMcastInfo = EthFwMcast_getExclusiveMcastInfo(macAddr, vlanId);
+            /* Some virtual port has registered with this exclusive multicast address */
+            if ((exclusiveMcastInfo != NULL) && 
+                (exclusiveMcastInfo->virtPort == virtPort))
+            {
+                if (exclusiveMcastInfo->refCnt > 1U)
+                {
+                    exclusiveMcastInfo->refCnt--;
+                }
+                else if (exclusiveMcastInfo->refCnt == 1U)
+                {
+                    exclusiveMcastInfo->refCnt--;
+                    status = EthFwMcast_filterDelMacExcl(virtPort, hEnet, macAddr);
+                    ETHFWTRACE_ERR_IF((status != ETHFW_SOK), status,
+                                    "Failed to delete exclusive mcast address");
+                    if (status == ETHFW_SOK)
+                    {
+                        exclusiveMcastInfo->isFree = BTRUE;
+                        exclusiveMcastInfo->refCnt = 0U;
+                    }
+                    else
+                    {
+                        /* Failed to delete exclusive multicast address, hence putting back the ref count to 1 */
+                        exclusiveMcastInfo->refCnt = 1U;
+                    }
+                }
+                else
+                {
+                    ETHFWTRACE_ERR(status, "Negative reference count failed to delete exclusive mcast address");
+                }
+            }
+            else
+            {
+                status = ETHFW_EFAIL;
+                ETHFWTRACE_ERR(status, "Failed to delete exclusive mcast address, not found");
+            }
         }
     }
     else
@@ -482,7 +570,29 @@ static EthFwMcast_SharedMcastInfo *EthFwMcast_getSharedMcastInfo(const uint8_t *
         }
     }
 
-    return found ? entry : NULL;
+    return (found ? entry : NULL);
+}
+
+static EthFwMcast_ExclusiveMcastInfo *EthFwMcast_getExclusiveMcastInfo(const uint8_t *macAddr,
+                                                                       uint16_t vlanId)
+{
+    EthFwMcast_ExclusiveMcastInfo *entry = NULL;
+    bool found = BFALSE;
+    uint32_t i;
+
+    for (i = 0U; i < ETHFW_EXCLUSIVE_MCAST_LIST_LEN; i++)
+    {
+        entry = &gEthFwMcastObj.exclusiveMcastTable.table[i];
+
+        if ((entry->isFree == BFALSE) && 
+            (EnetUtils_cmpMacAddr(&entry->macAddr[0U], macAddr)))
+        {
+            found = BTRUE;
+            break;
+        }
+    }
+
+    return (found ? entry : NULL);
 }
 
 static int32_t EthFwMcast_filterAddMacShared(EthRemoteCfg_VirtPort virtPort,
@@ -609,6 +719,7 @@ static int32_t EthFwMcast_filterAddMacExcl(EthRemoteCfg_VirtPort virtPort,
     uint32_t aleSwitchPortMask = gEthFwMcastObj.switchPortMask << 1U;
     uint32_t aleEntry;
     int32_t status = ETHFW_EFAIL;
+    uint32_t i = 0U;
 
     /* Lookup for multicast address (irrespective of VLAN) */
     lookupInArgs.addr.vlanId = 0U;
@@ -635,6 +746,27 @@ static int32_t EthFwMcast_filterAddMacExcl(EthRemoteCfg_VirtPort virtPort,
         ETHFWTRACE_ERR(status, "Failed to lookup mcast entry");
     }
 
+    if (status == ETHFW_SOK)
+    {
+        for (i = 0U; i < ETHFW_EXCLUSIVE_MCAST_LIST_LEN; i++)
+        {
+            if(gEthFwMcastObj.exclusiveMcastTable.table[i].isFree)
+            {
+                gEthFwMcastObj.exclusiveMcastTable.table[i].isFree = BFALSE;
+                gEthFwMcastObj.exclusiveMcastTable.table[i].refCnt = 1;
+                gEthFwMcastObj.exclusiveMcastTable.table[i].virtPort = virtPort;
+                EnetUtils_copyMacAddr(&gEthFwMcastObj.exclusiveMcastTable.table[i].macAddr[0U], macAddr);
+                break;
+            }
+        }
+        /* Exclusive multicast table full, increase the size of ETHFW_EXCLUSIVE_MCAST_LIST_LEN */
+        if (i == ETHFW_EXCLUSIVE_MCAST_LIST_LEN)
+        {
+            status = ETHFW_EALLOC;
+            ETHFWTRACE_ERR(status, "Error, exclusive multicast table full");
+        }
+    }
+
     /* Add multicast entry in ALE */
     if (status == ETHFW_SOK)
     {
-- 
2.34.1

Regards.

0 Doredla Sudheer Kumar over 1 year ago in reply to xie jc

TI__Guru* 80400 points

Hi,

xie jc said:
Unfortunately, I am still unable to use VLAN. I applied the patch by hand edit because there is not a 01001_user_guide.md file in my local code and I can't execute 'git am patch' successfully.I also check my PC environment and it can communicate over VLAN on SDK8.4,

What could possibly be the reason?

Patch looks fine, also from ETHFW Logs I could see Join VLAN from client to server is success.

Can you check by sending VLAN 69 packets with Linux client MAC address are reaching to Linux client or not?
Also, try ping from Linux client to remote peer device of same VLAN.

Best Regards,
Sudheer

0 xie jc over 1 year ago in reply to Doredla Sudheer Kumar

Expert 2450 points

Hi Sudheer,

According to the results of tcpdump, it seems that the network packet contains VLAN ID. However, there is still no way to ping each other within the local area network.Even though I have configured static ARP.The same environment can be pinged in SDK 8.4. What other possible reasons are there?

Fullscreen tcpdump.txt Download

root@j721e-evm:~# ifconfig
eth1      Link encap:Ethernet  HWaddr 70:54:4D:52:1E:55
          inet6 addr: fe80::7254:4dff:fe52:1e55/64 Scope:Link
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:24 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B)  TX bytes:4040 (3.9 KiB)

eth1.69   Link encap:Ethernet  HWaddr 70:54:4D:52:1E:55
          inet addr:192.168.69.2  Bcast:192.168.69.255  Mask:255.255.255.0
          inet6 addr: fe80::7254:4dff:fe52:1e55/64 Scope:Link
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:10 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B)  TX bytes:1594 (1.5 KiB)

lo        Link encap:Local Loopback
          inet addr:127.0.0.1  Mask:255.0.0.0
          inet6 addr: ::1/128 Scope:Host
          UP LOOPBACK RUNNING  MTU:65536  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B)  TX bytes:0 (0.0 B)

root@j721e-evm:~# tcpdump -i eth1 -ee &
[1] 220
root@j721e-evm:~# tcpdump: verbose output suppressed, use -v[v]... for full protocol decode
listening on eth1, link-type EN10MB (Ethernet), snapshot length 262144 bytes

root@j721e-evm:~# ping 192.168.69.2015:19:09.326958 70:54:4d:52:1e:55 (oui Unknown) > 33:33:00:00:00:02 (oui Unknown), ethertype 802.1Q (0x8100), length 74: vlan 69, p 0, ethertype IPv6 (0x86dd), j721e-evm > ip6-allrouters: ICMP6, router solicitation, length 16

PING 192.168.69.20 (192.168.69.20): 56 data bytes
15:19:11.387318 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 46: vlan 69, p 0, ethertype ARP (0x0806), Request who-has 192.168.69.20 tell j721e-evm, length 28
15:19:11.388932 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 340: vlan 69, p 0, ethertype IPv4 (0x0800), 0.0.0.0.bootpc > 255.255.255.255.bootps: BOOTP/DHCP, Request from 70:54:4d:52:1e:55 (oui Unknown), length 294
15:19:12.398607 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 46: vlan 69, p 0, ethertype ARP (0x0806), Request who-has 192.168.69.20 tell j721e-evm, length 28
15:19:13.422599 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 46: vlan 69, p 0, ethertype ARP (0x0806), Request who-has 192.168.69.20 tell j721e-evm, length 28
15:19:15.387504 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 46: vlan 69, p 0, ethertype ARP (0x0806), Request who-has 192.168.69.20 tell j721e-evm, length 28
15:19:16.398605 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 46: vlan 69, p 0, ethertype ARP (0x0806), Request who-has 192.168.69.20 tell j721e-evm, length 28
15:19:16.461001 70:54:4d:52:1e:55 (oui Unknown) > 33:33:00:00:00:02 (oui Unknown), ethertype IPv6 (0x86dd), length 70: j721e-evm > ip6-allrouters: ICMP6, router solicitation, length 16
15:19:17.422602 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 46: vlan 69, p 0, ethertype ARP (0x0806), Request who-has 192.168.69.20 tell j721e-evm, length 28
15:19:19.387667 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 46: vlan 69, p 0, ethertype ARP (0x0806), Request who-has 192.168.69.20 tell j721e-evm, length 28
15:19:19.847711 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype IPv4 (0x0800), length 336: 0.0.0.0.bootpc > 255.255.255.255.bootps: BOOTP/DHCP, Request from 70:54:4d:52:1e:55 (oui Unknown), length 294
15:19:20.398603 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 46: vlan 69, p 0, ethertype ARP (0x0806), Request who-has 192.168.69.20 tell j721e-evm, length 28
15:19:21.422600 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 46: vlan 69, p 0, ethertype ARP (0x0806), Request who-has 192.168.69.20 tell j721e-evm, length 28
15:19:23.387801 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 46: vlan 69, p 0, ethertype ARP (0x0806), Request who-has 192.168.69.20 tell j721e-evm, length 28
15:19:24.398599 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 46: vlan 69, p 0, ethertype ARP (0x0806), Request who-has 192.168.69.20 tell j721e-evm, length 28
15:19:25.422600 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 46: vlan 69, p 0, ethertype ARP (0x0806), Request who-has 192.168.69.20 tell j721e-evm, length 28
15:19:27.387910 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 46: vlan 69, p 0, ethertype ARP (0x0806), Request who-has 192.168.69.20 tell j721e-evm, length 28
15:19:28.398599 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 46: vlan 69, p 0, ethertype ARP (0x0806), Request who-has 192.168.69.20 tell j721e-evm, length 28
15:19:29.422603 70:54:4d:52:1e:55 (oui Unknown) > Broadcast, ethertype 802.1Q (0x8100), length 46: vlan 69, p 0, ethertype ARP (0x0806), Request who-has 192.168.69.20 tell j721e-evm, length 28

Regards.

0 Doredla Sudheer Kumar over 1 year ago in reply to xie jc

TI__Guru* 80400 points

Hi,

I can see ARP packets with VLAN 69 reaching to Linux client.

But, from Logs ARP is looking for 192.168.69.20 IP but eth1.69 has IP 192.168.69.2 so, ARP is not resolved.

Please ping for proper IP address i.e. 192.168.69.2 instead of 192.168.69.20.

Best Regards,
Sudheer

0 xie jc over 1 year ago in reply to Doredla Sudheer Kumar

Expert 2450 points

Hi Sudheer,

Doredla Sudheer Kumar said:
Please ping for proper IP address i.e. 192.168.69.2 instead of 192.168.69.20.

I am trying to ping other Ethernet devices within the local area network, so I believe the IP address 192.168.69.20 is correct.

Regards.

0 Doredla Sudheer Kumar over 1 year ago in reply to xie jc

TI__Guru* 80400 points

Hi,

I understood now, you are pining from TDA4 to PC.

Above I could see only ARP request from TDA4 tcpdump, can you please check on PC side, are you observing packet with VLAN?

Is not, can you check what is value configured for ".untagMask = 0U," in static VLAN. It should be 0, if not which even the bit is set while egress on that Port VLAN tag will be removed.

Best Regards,
Sudheer

0 xie jc over 1 year ago in reply to Doredla Sudheer Kumar

Expert 2450 points

Hi Sudheer,

Doredla Sudheer Kumar said:
Above I could see only ARP request from TDA4 tcpdump, can you please check on PC side, are you observing packet with VLAN?

Actually, I did not see any packet on PC side.

Doredla Sudheer Kumar said:
Is not, can you check what is value configured for ".untagMask = 0U," in static VLAN. It should be 0, if not which even the bit is set while egress on that Port VLAN tag will be removed.

Where can I check the "untagMask" value?I can't find this keyword in the rtos code.

Regards.

0 Doredla Sudheer Kumar over 1 year ago in reply to xie jc

TI__Guru* 80400 points

Hi,

xie jc said:
Doredla Sudheer Kumar said:
Above I could see only ARP request from TDA4 tcpdump, can you please check on PC side, are you observing packet with VLAN?

Actually, I did not see any packet on PC side.

Can you open wire-shark and check whether any packet received to PC or not? (both VLAN and non-VLAN interface)

xie jc said:
Doredla Sudheer Kumar said:
Is not, can you check what is value configured for ".untagMask = 0U," in static VLAN. It should be 0, if not which even the bit is set while egress on that Port VLAN tag will be removed.

Where can I check the "untagMask" value?I can't find this keyword in the rtos code.

How 69 VLAN added in ETHFW? Is it Static VLAN config or how?

Best Regards,
Sudheer

0 xie jc over 1 year ago in reply to Doredla Sudheer Kumar

Expert 2450 points

Hi Sudheer,

Doredla Sudheer Kumar said:
Can you open wire-shark and check whether any packet received to PC or not? (both VLAN and non-VLAN interface)

This wire-shark data is from PC to tda4ven.

wireshark_data.rar

Doredla Sudheer Kumar said:
How 69 VLAN added in ETHFW? Is it Static VLAN config or how?

Static?I only made the modifications shown in the screenshot below.

Regards.

0 Doredla Sudheer Kumar over 1 year ago in reply to xie jc

TI__Guru* 80400 points

Hi,

xie jc said:
Doredla Sudheer Kumar said:
Can you open wire-shark and check whether any packet received to PC or not? (both VLAN and non-VLAN interface)

This wire-shark data is from PC to tda4ven.

wireshark_data.rar

Have you created VLAN 69 Interface on PC side? I could find any from the wireshark log.

Are you expecting ping with non-VLAN interface on PC side? If so, you need to set untagMask as 0x1FE in static VLAN configuration.

Best Regards,
Sudheer

0 xie jc over 1 year ago in reply to Doredla Sudheer Kumar

Expert 2450 points

Hi Sudheer,

Doredla Sudheer Kumar said:
Have you created VLAN 69 Interface on PC side? I could find any from the wireshark log.

I think I have already created it, but I'm not sure why I can't see any information about VLAN from Wire-Shark.I uploaded both tcpdump data and Wireshark data using VLAN normally on SDK 8.4.

test data on SDK8.4.rar

Doredla Sudheer Kumar said:
Are you expecting ping with non-VLAN interface on PC side? If so, you need to set untagMask as 0x1FE in static VLAN configuration.

I think the main purpose of this thread is to discuss how to use VLAN for ping. So I am not considering using non-VLAN interface.

As we discussed earlier, how can I confirm the value of “untagMask” in the code.

Regards.

0 Doredla Sudheer Kumar over 1 year ago in reply to xie jc

TI__Guru* 80400 points

Hi,

xie jc said:
I think the main purpose of this thread is to discuss how to use VLAN for ping. So I am not considering using non-VLAN interface.

As we discussed earlier, how can I confirm the value of “untagMask” in the code.

Can you please dump ALE entries by referring to below FAQ.
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1204394/faq-tda4vm-how-to-print-the-ale-table-for-cpsw-in-tda4-dra8-devices

Best Regards,
Sudheer

0 xie jc over 1 year ago in reply to Doredla Sudheer Kumar

Expert 2450 points

Hi Sudheer,

Uploaded the ale print result from CCS.

Fullscreen ale_printf_sdk10.1.txt Download

MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: -------CPSWnG ALE TABLE----------------------
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 0 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 1
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 1 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 3
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 2 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 4094
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 3 - Multicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK        = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: SUPER            = 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE  = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR   = 0x0000FFFF 0xFFFFFFFF
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 4 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 1024
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x000001EC
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x000001EC
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x000001EC
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 5 - Unicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: TRUNK            = 0
MAIN_Cortex_R5_0_0: GEL Output: PORT_NUMBER      = 0
MAIN_Cortex_R5_0_0: GEL Output: BLOCK            = 0
MAIN_Cortex_R5_0_0: GEL Output: SECURE           = 1
MAIN_Cortex_R5_0_0: GEL Output: TOUCH            = 0
MAIN_Cortex_R5_0_0: GEL Output: AGEABLE          = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: UNICAST_ADDR     = 0x00007020 0x0F5FF354
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 6 - VLAN ETHERTYPE 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: ETHERTYPE         = 2054
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 7 - Unicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: TRUNK            = 0
MAIN_Cortex_R5_0_0: GEL Output: PORT_NUMBER      = 0
MAIN_Cortex_R5_0_0: GEL Output: BLOCK            = 0
MAIN_Cortex_R5_0_0: GEL Output: SECURE           = 0
MAIN_Cortex_R5_0_0: GEL Output: TOUCH            = 0
MAIN_Cortex_R5_0_0: GEL Output: AGEABLE          = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: UNICAST_ADDR     = 0x00007024 0x72A92BF4
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 8 - Multicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK        = 0x000001ED
MAIN_Cortex_R5_0_0: GEL Output: SUPER            = 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE  = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR   = 0x00003333 0x00000001
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 9 - Multicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK        = 0x000001ED
MAIN_Cortex_R5_0_0: GEL Output: SUPER            = 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE  = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR   = 0x00000100 0x5E000001
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 10 - Multicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK        = 0x000001ED
MAIN_Cortex_R5_0_0: GEL Output: SUPER            = 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE  = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR   = 0x00000180 0xC2000000
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 11 - Multicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK        = 0x000001ED
MAIN_Cortex_R5_0_0: GEL Output: SUPER            = 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE  = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR   = 0x00000180 0xC2000003
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 12 - Multicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK        = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: SUPER            = 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE  = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR   = 0x00003333 0xFFA92BF4
MAIN_Cortex_R5_0_0: GEL Output: Completed analysis of 1024 ALE entries

Regards.

0 Doredla Sudheer Kumar over 1 year ago in reply to xie jc

TI__Guru* 80400 points

HI,

I could not seen VLAN 69 Entry in ALE table, have you captured the ALE entries after the VLAN addition from client?
I can see VLAN entry of 1024 only from table.

Please capture log in actual test scenario where VLAN 69 is configured?

Best Regards,
Sudheer

0 xie jc over 1 year ago in reply to Doredla Sudheer Kumar

Expert 2450 points

Hi Sudheer,

Sorry for not replying in a timely manner.

After configuring VLAN, I obtained the result of ale print again and reuploaded it.

Fullscreen ale_printf_sdk10.1_v2.txt Download

MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: -------CPSWnG ALE TABLE----------------------
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 0 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 1
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 1 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 3
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 2 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 4094
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 3 - Multicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK        = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: SUPER            = 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE  = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR   = 0x0000FFFF 0xFFFFFFFF
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 4 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 1024
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x000001EC
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x000001EC
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x000001EC
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 5 - Unicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: TRUNK            = 0
MAIN_Cortex_R5_0_0: GEL Output: PORT_NUMBER      = 0
MAIN_Cortex_R5_0_0: GEL Output: BLOCK            = 0
MAIN_Cortex_R5_0_0: GEL Output: SECURE           = 1
MAIN_Cortex_R5_0_0: GEL Output: TOUCH            = 0
MAIN_Cortex_R5_0_0: GEL Output: AGEABLE          = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: UNICAST_ADDR     = 0x000070BE 0x88EA4E9A
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 6 - VLAN ETHERTYPE 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: ETHERTYPE         = 2054
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 7 - Unicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: TRUNK            = 0
MAIN_Cortex_R5_0_0: GEL Output: PORT_NUMBER      = 0
MAIN_Cortex_R5_0_0: GEL Output: BLOCK            = 0
MAIN_Cortex_R5_0_0: GEL Output: SECURE           = 0
MAIN_Cortex_R5_0_0: GEL Output: TOUCH            = 0
MAIN_Cortex_R5_0_0: GEL Output: AGEABLE          = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: UNICAST_ADDR     = 0x000070A6 0x0640B8C3
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 8 - Multicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK        = 0x000001ED
MAIN_Cortex_R5_0_0: GEL Output: SUPER            = 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE  = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR   = 0x00003333 0x00000001
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 9 - Multicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK        = 0x000001ED
MAIN_Cortex_R5_0_0: GEL Output: SUPER            = 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE  = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR   = 0x00000100 0x5E000001
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 10 - Multicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK        = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: SUPER            = 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE  = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR   = 0x00003333 0xFF40B8C3
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 11 - Multicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK        = 0x000001ED
MAIN_Cortex_R5_0_0: GEL Output: SUPER            = 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE  = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR   = 0x00000180 0xC2000000
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 12 - Multicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK        = 0x000001ED
MAIN_Cortex_R5_0_0: GEL Output: SUPER            = 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE  = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR   = 0x00000180 0xC2000003
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 13 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 69
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x000001ED
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x000001ED
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x000001ED
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 14 - Multicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK        = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: SUPER            = 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE  = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR   = 0x00000180 0xC2000021
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 15 - Multicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK        = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: SUPER            = 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE  = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR   = 0x00000180 0xC200000E
MAIN_Cortex_R5_0_0: GEL Output: Completed analysis of 1024 ALE entries

Regards.

0 Doredla Sudheer Kumar over 1 year ago in reply to xie jc

TI__Guru* 80400 points

HI,

I can see VLAN entry of 69 with Port mask of all Ports excepts MAC Port-1 and Port-4 as these are by default MAC only Ports.

if you are checking data transfer from above ports, It can't be as port mask is not enabled for those ports. If you are using nay of switch port then packet will go out of MAC and should be received by PC.

Also, Can you provide the ALE table entries in working case of older SDK 8.4.

Best Regards,
Sudheer

0 xie jc over 1 year ago in reply to Doredla Sudheer Kumar

Expert 2450 points

Hi Sudheer,

Doredla Sudheer Kumar said:
I can see VLAN entry of 69 with Port mask of all Ports excepts MAC Port-1 and Port-4 as these are by default MAC only Ports.

if you are checking data transfer from above ports, It can't be as port mask is not enabled for those ports. If you are using nay of switch port then packet will go out of MAC and should be received by PC.

I'm not sure what to do next step.

Doredla Sudheer Kumar said:
Also, Can you provide the ALE table entries in working case of older SDK 8.4.

Fullscreen ale_printf_sdk8.4_v1.txt Download

MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: -------CPSWnG ALE TABLE----------------------
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 0 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 300
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 1 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 0
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 2 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 401
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 3 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 402
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 4 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 403
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 5 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 404
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 6 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 405
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 7 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 406
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 8 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 407
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 9 - Multicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK        = 0x000001FF
MAIN_Cortex_R5_0_0: GEL Output: SUPER            = 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0
MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE  = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR   = 0x0000FFFF 0xFFFFFFFF
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 10 - Unicast
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: TRUNK            = 0
MAIN_Cortex_R5_0_0: GEL Output: PORT_NUMBER      = 0
MAIN_Cortex_R5_0_0: GEL Output: BLOCK            = 0
MAIN_Cortex_R5_0_0: GEL Output: SECURE           = 1
MAIN_Cortex_R5_0_0: GEL Output: TOUCH            = 0
MAIN_Cortex_R5_0_0: GEL Output: AGEABLE          = 0
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE       = 1
MAIN_Cortex_R5_0_0: GEL Output: UNICAST_ADDR     = 0x00004241 0x49430017
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 11 - VLAN ETHERTYPE 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: ETHERTYPE         = 2054
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output:  Entry 12 - VLAN INNER 
MAIN_Cortex_R5_0_0: GEL Output: ---------------------------------------------
MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE        = 2
MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID          = 69
MAIN_Cortex_R5_0_0: GEL Output: NO FRAG           = 0
MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD   = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG           = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR      = 0
MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST  = 0x00000003
MAIN_Cortex_R5_0_0: GEL Output: Completed analysis of 1024 ALE entries

Regards.

0 Doredla Sudheer Kumar over 1 year ago in reply to xie jc

TI__Guru* 80400 points

Hi,

If you see ALE dump in working case, you have Port-1 & Host Port Mask List, which means you are testing via MAC Port-1.

As mentioned above by default Port Mask of MAC Port-1 is not added in static VLAN, as it is MAC only Port.

Please update below values in static VLAN entry with required port Mask, only those ports will allow configured VLAN.

Best Regards,
Sudheer

0 xie jc over 1 year ago in reply to Doredla Sudheer Kumar

Expert 2450 points

Hi Sudheer,

May I ask what is the optimal setting for these values? The definitions of these macros are shown in the screenshot below.

Regards.

0 Doredla Sudheer Kumar over 1 year ago in reply to xie jc

TI__Guru* 80400 points

Hi,

xie jc said:
May I ask what is the optimal setting for these values? The definitions of these macros are shown in the screenshot below.

You need to use Mask as required based on which all MAC Ports you want to be path of this VLAN.

As informed above in SDK 8.4 you have enabled on MAC Port-1, but in latest TI SDK by default we have added all switch Ports under mask.

Best Regards,
Sudheer

0 xie jc over 1 year ago in reply to Doredla Sudheer Kumar

Expert 2450 points

Hi Sudheer,

Doredla Sudheer Kumar said:
You need to use Mask as required based on which all MAC Ports you want to be path of this VLAN.

Unfortunately, due to unclear VLAN configuration rules and how to configure masks, I have made some mask configurations but still cannot use VLAN properly. Can you help verify whether SDK10.1 can use VLAN normally on the EVM board?

Doredla Sudheer Kumar said:
As informed above in SDK 8.4 you have enabled on MAC Port-1, but in latest TI SDK by default we have added all switch Ports under mask.

How should I configure it to achieve the effect of SDK 8.4？What does the message 'in latest TI SDK by default we have added all switch ports under mask' mean?

Currently, in the same hardware environment, SDK8.4 can use VLAN normally while SDK10.1 cannot. We believe that there are still issues with the VLAN configuration on SDK10.1.

Regards.

0 Doredla Sudheer Kumar over 1 year ago in reply to xie jc

TI__Guru* 80400 points

Hi,

xie jc said:
Doredla Sudheer Kumar said:
You need to use Mask as required based on which all MAC Ports you want to be path of this VLAN.

Unfortunately, due to unclear VLAN configuration rules and how to configure masks, I have made some mask configurations but still cannot use VLAN properly. Can you help verify whether SDK10.1 can use VLAN normally on the EVM board?

Make Mask configuration same as in SDK 8.4.

Also, Please confirm are you enabling any MAC only Ports in SDK 8.4 if so, make sure same configuration enabled in SDK 10.1.

Please refer to ETHFW User Guide for more details.

https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-j784s4/latest/exports/docs/ethfw/docs/user_guide/ethfw_c_ug_top.html#ethfw_vlan_server_cfg

Best Regards,
Sudheer

0 xie jc over 1 year ago in reply to Doredla Sudheer Kumar

Expert 2450 points

Hi Sudheer,

I'm glad to tell you that the static VLAN configuration should be working.

The root cause is that the configuration of the port mask does not include Mac_port_1.

Regards.

0 Doredla Sudheer Kumar over 1 year ago in reply to xie jc

TI__Guru* 80400 points

Hi,

xie jc said:
The root cause is that the configuration of the port mask does not include Mac_port_1.

Yes, I have pointed the difference above with 8.4 vs 10.1.

Thank you for confirmation.

Best Regards,
Sudheer

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