Still I didnt get any reply...Please give me your reply asap.
Thanks
TQR
its been two three days but I didnt get any reply for this post..
please reply to my queries and help me to complete the task on time.
thanks
tauqueer
Hi,
I am using TMDSEVM3730 as our development board and want to connect my FPGA board with available mcbsp port of the 37x board.
I just want to loopback the mcbsp signal from my fpga means I want to take clkx , syncx and DTX from 37x mcbsp and rout them back to mcbsp again on clkr, syncr and DR respectively of same mcbsp (MCBSP1) at the same time without any delay.
I just want to confirm that will this logic work??
if yes then in which mode I should configure the mcbsp1?
I am thinking of configuring it in transmit in master in receive in slave mode.
Please guide me with the right approach to get the required logic.
thanks
tauqueer