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DMA addressing in C5535

Alexey Strekhnin
Prodigy 20 points
Other Parts Discussed in Thread: TMS320C5515

Hi, there is an example of DMA using in TMS320C5535/34/33/32 ULP DSP Technical Reference Manual on page 145. I can't understand how CPU word source address 78 0000h is set to equivalent DMA byte address 0500 0000h. Could you show me an algorhytm to get the right address? Regards, Alexey.

  • 0
    TI__Mastermind 23785 points

    Alexey,

    This example using EMIF space which is not supported in C5535/34/33/32 family.

    If you refer to C5532 memory mapping, CPU word address 78 0000h is equal to CPU byte address F0 0000h. Then in C5532 Memory Map Summary figure, CPU byte address F0 0000h is mapped to DMA byte address 0500 0000h. This is how they map to each other.

    I will update this example to a DARAM block for C5535/34/33/32 family.

    Regards.

     

  • 0 in reply to Steve Tsang
    Prodigy 20 points

    Thanks for answer! But how CPU byte address F0 0000h is mapped to DMA byte address 0500 0000h? Is it necessary to add some offset to the CPU byte address? If it is, what offset i need to add to the CPU byte address? There is some offsets In Table 3-1 on page 137 in C5535/34/33/32 Manual, but it too small to convert F0 0000h to 0500 0000h. Could you show me in detail how to transform F0 0000h to 0500 0000h?


    Regards.

  • 0 in reply to Alexey Strekhnin
    TI__Mastermind 23785 points

    If you refer to C5515 data manual:

    http://www.ti.com/lit/ds/symlink/tms320c5515.pdf

    Figure 3-1. Memory Map Summary, CPU byte address F0 0000h is mapped to DMA byte address 0500 0000h. This is how the device is designed. Furthermore, the CPU byte addresses map to DMA byte addresses on this figure are fixed.

    Also, DMA byte address 0500 0000h is accessible via EMIF which is not supported on C5535/34/33/32 family devices. All the External Spaces on Figure 3-1 are accessible via EMIF.

    Hope this answer your question.

    regards.