This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMDS64EVM: CR5 behaves after a warm reset

Part Number: TMDS64EVM

Tool/software:

Hello TI support team.

Please tell me how CR5 behaves after a warm reset.
The SDK is mcu_plus_sdk_am64x_09_01_00_41.

CA53 and CR5 applications are being run from SBL OSPI.
When b0110 is written to SW_MAIN_WARMRST in CTRLMMR_RST_CTRL from CA53,
a warm reset of the MAIN domain is performed.
However, instead of running SBL OSPI, CR5 starts up in UART Boot, which is the Backup Boot Mode.
I would like to know what the cause of this is.

Best regards,
Kiyomasa Imaizumi.

  • Hello Kiyomasa Imaizumi,

    We never faced this type of issues on the EVM.

    Can you please confirm, did you change the SBL OSPI application or, by default, SBL OSPI is used in your application ?

    Regards,
    Anil.

  • Hello Swargam Anil.

    I would like to know about SBL OSPI.
    If I'm only running the CA53 application from SBL OSPI and there is no CR5 application, how should I implement the last part of the SBL OSPI code?
    After calling the Bootloader_runCpu(CA53) function, is the following code still necessary even if there is no CR5 application?

    ---
    status = Bootloader_rprcImageLoad(bootHandle, &bootImageInfo.cpuInfo[CSL_CORE_ID_R5FSS0_0]);
    Bootloader_runSelfCpu(bootHandle, &bootImageInfo);
    ---

    Best regards,
    Kiyomasa Imaizumi.

  • Hello Kiyomasa Imaizumi,

    If you don't want the R5F and M4F cores, then you don't need to change any SBL OPSI application.

    Because, when you send a multicore app image, the SBL can check which the app images are presented in the app images.

    Based on the cores' present information, the cores can initialize and run.

    Regards,

    Anil.