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New C6678 H/W Design Guide - Unused Clock Connections

Richard Marsh
Intellectual 760 points

Hi,

I am going through the changes of the new H/W Design Guide and would like to query the following...

 

The new document's revision history says:

"Section 7.4.4: changed pull up location from variable core to fixed core supply for SRIOSGMIISCLK"

 

Section 7.4.4 of the new doc says:

"If both SRIO and SGMII are unused, the primary SRIOSGMIICLK clock input shall be configured as indicated in Section 3.2.1, Figure 5. Pullup shall be to CVDD core supply. "

 

I think CVDD is the variable core supply, therefore the note in the revision history is incorrect.  Can you please confirm that the note in the change history is incorrect and that the main document is correct.

Regards,

Richard