TDA4VH-Q1: DMA DRU Channels

hi,

Yes, it has run out of CQ Ring and you would need to allocate more rings to this core.. 

Regards,

Brijesh

Hi,

Thanks for the response ,

I have used the sysconfig tool to change and generate a set of files,

How will now use these files ?

I am using SDK 9.2 

In PDK , do i need to build all the libs?? or just sciclient libs?

Hi, 

Thanks for the response,

How do we find which boot process is followed, Image is given by the clients. 

So, I don't know what they did inside that!

U-Boot SPL 2023.04-dirty (Apr 01 2025 - 15:11:15 +0530)
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.4--v09.02.04 (Kool Koala)')
SPL initial stack usage: 13456 bytes
Trying to boot from MMC2
Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the image was also encrypted
Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the image was also encrypted
Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the image was also encrypted
Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the image was also encrypted
Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the image was also encrypted
Loading Environment from nowhere... OK
Starting ATF on ARM64 core...

NOTICE: BL31: v2.10.0(release):v2.10.0-367-g00f1ec6b87-dirty
NOTICE: BL31: Built : 16:09:05, Feb 9 2024
I/TC:
I/TC: OP-TEE version: 4.1.0-51-g012cdca49 (gcc version 11.4.0 (GCC)) #1 Tue Jan 30 10:48:03 UTC 2024 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check optee.readthedocs.io/.../porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: GIC redistributor base address not provided
I/TC: Assuming default GIC group status and modifier
I/TC: SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.4--v09.02.04 (Kool Koala)')
I/TC: HUK Initialized
I/TC: Activated SA2UL device
I/TC: Fixing SA2UL firewall owner for GP device
I/TC: Enabled firewalls for SA2UL TRNG device
I/TC: SA2UL TRNG initialized
I/TC: SA2UL Drivers initialized
I/TC: Primary CPU switching to normal world boot

U-Boot SPL 2023.04-dirty (Apr 01 2025 - 15:11:12 +0530)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.4--v09.02.04 (Kool Koala)')
Trying to boot from MMC2
Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the image was also encrypted
Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the image was also encrypted

U-Boot 2023.04-dirty (Apr 01 2025 - 15:11:12 +0530)

SoC: J784S4 SR1.0 GP
Model: Texas Instruments J784S4 EVM
Board: J784S4X-EVM rev E5
DRAM: 2 GiB (effective 32 GiB)
idle-statesCore: 91 devices, 33 uclasses, devicetree: separate
Flash: spi_nand nand@0: Winbond SPI NAND was found.
spi_nand nand@0: 128 MiB, block size: 256 KiB, page size: 4096, OOB size: 128
0 Bytes MMC: mmc@4f80000: 0, mmc@4fb0000: 1| Minicom 2.8 | VT102 | Offline | ttyUSB0 Loading Environment from nowhere... OK
In: serial@2880000
Out: serial@2880000
Err: serial@2880000
am65_cpsw_nuss ethernet@46000000: K3 CPSW: nuss_ver: 0x6BA02102 cpsw_ver: 0x6BA82102 ale_ver: 0x00293904 Ports:1 mdio_freq:1000000
Net: eth0: ethernet@460000v00port@1
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc1 is current device
SD/MMC found on device 1
Failed to load 'boot.scr'
1747 bytes read in 22 ms (77.1 KiB/s)
Loaded env from uEnv.txt
Importing environment from mmc1 ...
Running uenvcmd ...
gpio: pin gpio@22_17 (gpio 188) value is 1
gpio: pin gpio@22_16 (gpio 187) value is 0
k3_r5f_rproc r5f@41000000: Core 1 is already in use. No rproc commands work
Failed to load '/lib/firmware/j784s4-mcu-r5f0_1-fw'
478760 bytes read in 32 ms (14.3 MiB/s)
Load Remote Processor 2 with data@addr=0x82000000 478760 bytes: Success!
322804 bytes read in 30 ms (10.3 MiB/s)
Load Remote Processor 3 with data@addr=0x82000000 322804 bytes: Success!
150752 bytes read in 28 ms (5.1 MiB/s)
Load Remote Processor 4 with data@addr=0x82000000 150752 bytes: Success!
150752 bytes read in 28 ms (5.1 MiB/s)
Load Remote Processor 5 with data@addr=0x82000000 150752 bytes: Success!
478460 bytes read in 32 ms (14.3 MiB/s)
Load Remote Processor 6 with data@addr=0x82000000 478460 bytes: Success!
150752 bytes read in 28 ms (5.1 MiB/s)
Load Remote Processor 7 with data@addr=0x82000000 150752 bytes: Success!
15605624 bytes read in 188 ms (79.2 MiB/s)

Load Remote Processor 8 with data@addr=0x82000000 15605624 bytes: Success!
18555880 bytes read in 219 ms (80.8 MiB/s)
Load Remote Processor 9 with data@addr=0x82000000 18555880 bytes: Success!
18555880 bytes read in 218 ms (81.2 MiB/s)
Load Remote Processor 10 with data@addr=0x82000000 18555880 bytes: Success!
18555880 bytes read in 219 ms (80.8 MiB/s)
Load Remote Processor 11 with data@addr=0x82000000 18555880 bytes: Success!
19376640 bytes read in 225 ms (82.1 MiB/s)
114029 bytes read in 27 ms (4 MiB/s)
Working FDT set to 88000000
13362 bytes read in 25 ms (521.5 KiB/s)
Failed to load '/boot/dtb/ti/k3-j721s2-evm-fusion.dtbo'
Failed to load '/boot/dtb/ti/k3-fpdlink-Neducam25-cam-0.dtbo'
Failed to load '/boot/dtb/ti/k3-fpdlink-Neducam25-cam-1.dtbo'
## Flattened Device Tree blob at 88000000
Booting using the fdt blob at 0x88000000
Working FDT set to 88000000
ERROR: reserving fdt memory region failed (addr=880000000 size=80000000 flags=4)
Loading Device Tree to 000000008fee1000, end 000000008fffffff ... OK
Working FDT set to 8fee1000

Starting kernel ...

[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x411fd080]
[ 0.000000] Linux version 6.1.80-ti-g2e423244f8c0 (oe-user@oe-host) (aarch64-oe-linux-gcc (GCC) 11.4.0, GNU ld (GNU Binutils) 2.38.20220708) #1 SMP PREEMPT Wed Mar 20 14:43:33 UTC 2024
[ 0.000000] Machine model: Texas Instruments J784S4 EVM
[ 0.000000] earlycon: ns16550a0 at MMIO32 0x0000000002880000 (options '')
[ 0.000000] printk: bootconsole [ns16550a0] enabled
[ 0.000000] efi: UEFI not found.
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a0000000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a0000000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a0100000, size 15 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a0100000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a1000000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a1000000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a1100000, size 15 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a1100000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a2000000, size 1 MiB
[

Please check with your client as to which bootflow they are using. We can't figure out from this log. 

Regards,

Brijesh

Thanks for the response,

Able to increase the DMA DRU channels, after replacing the rm_cfg.xml. and regenerate u-boot using top level Makefile,  make u-boot

I kept the 

dru dma channels -> 7, 7, 6, 6

RA rings -> 15, 15, 15, 14

for C7x_0 core I am able to open 7 DMA channels, whereas for C7x_1 I was not able to do the same, I am able to open 5 only, and there was no error getting printed from udma driver code. 

Hi Gowtham,

But are you using TIDL on C7x? Then many of these DRU channels will be used by TIDL, why do you need to DRU channels on C7x? How do you make sure that there is no conflict between TIDL and the channels you have allocated? 

Regards,

Brijesh

No , I am not using TIDL, 

I am using UDMA channels to copy data from DDR to L2

But have you loaded event TIDL on C7x, even if you are not using? If not, how many DRU channels are allocated to C7x ?

Regards,

Brijesh 

Hi, Thanks for the response, able to open 8 DRU channels for both C7x_0 and C7x_1 ,

generated rm_cfg.yml and regenerated u-boot.

Are there profiling figures for UDMA???

We have some standalone numbers available in the datasheet, so please check the performance numbers in datasheet. 

Regards,

Brijesh