AM62L: NAND/NOR Boot Issues

mazel li said:

After switching to OSPI NAND boot mode, the system fails to boot. 

What do you mean by "fails to boot"? Is there any output at all (U-Boot?). If so please share partial boot log.

Regards, Andreas

I did a test on EVM board, boot dialing code using boot0-boot15:(1100 0001 0011 0000),boot just prints the information in the picture.

The logs are as follows

root@am62lxx-evm:/run/media/boot-mmcblk0p1# cat /proc/mtd 
dev:    size   erasesize  name
mtd0: 00080000 00040000 "ospi.tiboot3"
mtd1: 00200000 00040000 "ospi.tispl"
mtd2: 00400000 00040000 "ospi.u-boot"
mtd3: 00040000 00040000 "ospi.env"
mtd4: 00040000 00040000 "ospi.env.backup"
mtd5: 037c0000 00040000 "ospi.rootfs"
mtd6: 00040000 00040000 "ospi.phypattern"
mtd7: 00080000 00020000 "ospi_nand.tiboot3"
mtd8: 00200000 00020000 "ospi_nand.tispl"
mtd9: 00400000 00020000 "ospi_nand.u-boot"
mtd10: 00040000 00020000 "ospi_nand.env"
mtd11: 00040000 00020000 "ospi_nand.env.backup"
mtd12: 05fe0000 00020000 "ospi_nand.rootfs"
mtd13: 00020000 00020000 "ospi_nand.phypattern"
root@am62lxx-evm:/run/media/boot-mmcblk0p1# 
root@am62lxx-evm:/run/media/boot-mmcblk0p1# flash_erase /dev/mtd7 0 0 ; sleep 1 ; nandwrite -a -p /dev/mtd7 tiboot3.bin 
Erasing 512 Kibyte @ 0 -- 100 % complete 
Writing data to block 0 at offset 0x0
Writing data to block 1 at offset 0x20000
root@am62lxx-evm:/run/media/boot-mmcblk0p1# 
root@am62lxx-evm:/run/media/boot-mmcblk0p1# 
root@am62lxx-evm:/run/media/boot-mmcblk0p1# flash_erase /dev/mtd8 0 0 ; sleep 1 ; nandwrite -a -p /dev/mtd8 tispl.bin 
Erasing 2048 Kibyte @ 0 -- 100 % complete 
Writing data to block 0 at offset 0x0
Writing data to block 1 at offset 0x20000
Writing data to block 2 at offset 0x40000
Writing data to block 3 at offset 0x60000
Writing data to block 4 at offset 0x80000
Writing data to block 5 at offset 0xa0000
root@am62lxx-evm:/run/media/boot-mmcblk0p1#

mazel li said:

I did a test on EVM board, boot dialing code using boot0-boot15:(1100 0001 0011 0000),boot just prints the information in the picture.

The logs are as follows

The prints indicate that ROM falls back to UART boot as the primary bootmode fails.

mazel li said:

using boot0-boot15:(1100 0001 0011 0000),

Can you try setting BOOTMODE[7] to '0'? This will configure for 1-1-8 mode (instead of 1-1-4 mode). From the AM62L TRM...

Also, your first log shows 7 partitions under /proc/mtd, but your second one shows 14? Why does the second log show these duplicate entries?

Regards, Andreas

BOOTMODE[7] set to '0' doesn't start either, no change in the startup printout.

The second log is because I burned the Ti image on the AM62L EVM board, mtd0-mtd6 for ospi_nor.

I would like to implement OSPI booting on the AM62L EVM board first.
Thank you

mazel li said:

The second log is because I burned the Ti image on the AM62L EVM board, mtd0-mtd6 for ospi_nor.

Ah ok, I had a closer look. Yes that particular EVM has actually both OSPI NOR and QSPI NAND Flash devices connected to the same AM62L OSPI peripheral module, but using different chip-select signals (CS0 for NOR, CS3 for NAND) to distinguish between the two Flash devices.

(from the AM62L EVM User's Guide)

This being said, when selecting serial NAND boot mode, there is no way to change the chip-select signal to something other than CS0. In other words, using the AM62L EVM you cannot boot from the on-board serial NAND flash.

However you should be able to use the OSPI NOR flash that's on board. Let me know if you want to use this and need help with that.

Regards, Andreas

Thank you，I get it.

I wrote the firmware to the OSPI NOR in the same way and it still boots like this. Only when the boot toggle is set to “xSPI SFPD 1” it prints a little, but gets stuck.

When I boot with OSPI NOR, how should I set the dialing code?

The error log you get points to that the device boot ROM is successfully loading the first stage of boot firmware (tiboot3.bin) from OSPI NOR flash, but then fails to load and/or authenticate the second state of boot (tispl3.bin). I just gave this a quick try on my own AM62L EVM, and it seems like I can readily re-create this issue. Your boot mode switches are set correctly.

I need to spend more time to analyze this further. It looks a bit like Errata i2474 which however does not explicitly list OSPI NOR as an affected boot mode, so this may or may not be related. Too early to tell really, I'll spend some more time on this to figure this out and get back here.

Regards,
Andreas

After some more experiments it looks like for some reason (potentially related to Errata i2474 as mentioned earlier) the 8D-8D-8D transfer mode doesn't seem to work for loading/authenticating the 2nd boot stage. However I found that the 1D-1D-1D mode works. In order to use this mode, you need to disable SFDP mode first (so that ROM doesn't automatically enable 8D mode after parsing the capabilities), and make sure to manually configure for 1D-1D-1D mode. This means using a bootmode setting of 0xc73. Below example shows this working with the SDK v11.0 binaries in a way the boot mode is set programmatically (easier for testing), but you should be able to use the same setting via AM62L EVM dip switches.

# SFDP disabled, 0x0B Read Command, 1D-1D-1D Mode -> OK !!
=> mw.l 0x43010030 0x00000c73 && reset
resetting ...
NOTICE:  bl1_plat_arch_setup arch setup
NOTICE:  Booting Trusted Firmware
NOTICE:  BL1: v2.12.0(release):11.00.04-10-gdd46885ec-dirty
NOTICE:  BL1: Built : 05:00:39, Feb 26 2025
NOTICE:  lpdd4_init <--
NOTICE:  DDR ram size =80000000
NOTICE:  bl1_platform_setup DDR init done
NOTICE:  k3_bl1_handoff ENTERING WFI - end of bl1
NOTICE:  BL31: v2.12.0(release):11.00.04-10-gdd46885ec-dirty
NOTICE:  BL31: Built : 05:00:39, Feb 26 2025
ERROR:   Failed to get response (-19)
ERROR:   Transfer send failed (-19)
ERROR:   Agent 0 Protocol 0x10 Message 0x7: not supported

U-Boot SPL 2025.01-00253-g9a3137c5c11a (Feb 26 2025 - 17:07:57 +0000)
SPL initial stack usage: 1872 bytes
Trying to boot from SPI
ERROR:   Agent 0 Protocol 0x10 Message 0x7: not supported


U-Boot 2025.01-00253-g9a3137c5c11a (Feb 26 2025 - 17:07:57 +0000)

SoC:   AM62LX SR1.0 HS-FS
Model: Texas Instruments AM62L3 Evaluation Module
DRAM:  2 GiB
ERROR:   Agent 0 Protocol 0x10 Message 0x7: not supported
Core:  66 devices, 28 uclasses, devicetree: separate
MMC:   mmc@fa10000: 0, mmc@fa00000: 1
Loading Environment from nowhere... OK
In:    serial@2800000
Out:   serial@2800000
Err:   serial@2800000
Net:   eth0: ethernet@8000000port@1
Warning: ethernet@8000000port@2 (eth1) using random MAC address - ee:54:21:4e:e1:c0
, eth1: ethernet@8000000port@2
Hit any key to stop autoboot:  0
=>

Can you please see if you can re-create successful boot to U-Boot prompt on your end.

Regards, Andreas

Just a quick follow-up on this...

Andreas Dannenberg said:

After some more experiments it looks like for some reason (potentially related to Errata i2474 as mentioned earlier) the 8D-8D-8D transfer mode doesn't seem to work for loading/authenticating the 2nd boot stage

Discussing with the team I was made aware of a recently discovered boot ROM issue that has not yet been included in the external errata (but will be soon) that affects the 8D-8D-8D boot just like you encountered. The workaround for this issue is that the flash has to be reset during the boot process by TF-A.  If you want to get the boot in 8D-8D-8D mode working try applying the below workaround for TF-A that is currently staged, then re-build TF-A, and re-built U-Boot.

PENDING: feat(ti): Add workaround for errata i2462
https://github.com/r-vignesh/arm-trusted-firmware/commit/b86d40329ad2dce45afd12e6d12c4d058c740b80

The Yocto SDK User's Guide for AM62L has the steps for (re-)building U-Boot and TF-A if you need them,

Regards, Andreas

Thanks, I will recompile and test this issue again.

Hi,

I recompiled on my board for testing and it's stuck in U-Boot SPL:

NOTICE:  Booting Trusted Firmware
NOTICE:  BL1: v2.12.0(release):33c1fcc3c-dirty
NOTICE:  BL1: Built : 02:53:16, Apr  8 2025
NOTICE:  BL1: dram_class: 10
NOTICE:  lpddr4: post start - PI training status=0x29c02000 
NOTICE:  bl1_platform_setup DDR init done
NOTICE:  k3_bl1_handoff ENTERING WFI - end of bl1
NOTICE:  BL31: v2.12.0(release):33c1fcc3c-dirty
NOTICE:  BL31: Built : 02:53:16, Apr  8 2025
NOTICE:  0_ADC0's parent is 0
NOTICE:  0_ADC0's parent (after set_parent) is 2
ERROR:   Agent 0 Protocol 0x10 Message 0x7: not supported

U-Boot SPL 2025.01-00256-gab383c3b7d56 (Mar 28 2025 - 06:58:19 +0000)
SPL initial stack usage: 1872 bytes
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

So looks like you are able to move past the previous issue, and now U-Boot SPL (A53) is getting loaded and started successfully.

I was told the entire U-Boot chain should work without issues at this point.

What U-Boot/SPL version are you using? I don't see the commit you have (`ab383c3b7d56`) in our source tree.

Please re-build and use the latest U-Boot/SPL from https://git.ti.com/cgit/ti-u-boot/ti-u-boot/log/?h=ti-u-boot-2025.01 (same as official AM62L SDK at https://www.ti.com/tool/download/AM62L-LINUX-SDK/11.00.05.02) using the appropriate configs that are supplied with the SDK.

Regards, Andreas

Excuse me.
What is happening is that I am unable to verify OSPI-NOR booting on the AM62L EVM because there is a problem with the AM62L EVM power supply that prevents it from powering up and booting.
And my ultimate goal is to implement QSPI NAND boot on my own development board, I made my own development board with QSPI NAND, the SD card boots up and can read/write QSPI NAND now, but I can't QSPI NAND boot yet. Regarding QSPI NAND boot, can it be supported at the moment?

Currently I burned and wrote the firmware to the QSPI NAND and I dialed the dial code to BOOTMODE[15:12]:1001 and printed the message as shown:

I eventually need to ensure that the QSPI NAND boots so that my customers can use it.

Thank you.

mazel li said:

What is happening is that I am unable to verify OSPI-NOR booting on the AM62L EVM because there is a problem with the AM62L EVM power supply that prevents it from powering up and booting.
And my ultimate goal is to implement QSPI NAND boot on my own development board,

Ok so now I'm confused, please help me to clear this up. If I understood correctly, your AM62L EVM doesn't power up and boot for some reason (did it get damaged? how?). But then you also have your own custom AM62L board with NAND. Is this what the boot log you shared earlier is from? But then you also say QSPI NAND doesn't boot?

Regards, Andreas

I apologize for the confusion. Initially, I tested the TF-A patch you provided on the AM62L EVM. However, I incorrectly configured the DIP switch, causing the system to stall at the U-Boot/SPL stage. Yesterday, upon realizing the DIP switch error, I adjusted it to xSPI boot mode for retesting. However, after connecting the power, the AM62L EVM failed to power on (no indicator lights), possibly due to a damaged chip. Therefore, I was unable to successfully validate your patch on the AM62L EVM.
Additionally, we developed our own circuit board designed for QSPI NAND boot, which subsequently encountered the log issues I reported yesterday.

Initially, I intended to validate NAND boot functionality and learn about the AM62L platform using the AM62L EVM. Now that my custom board is ready, the priority is resolving the QSPI NAND boot failure issue on this board. I would greatly appreciate your technical support to address this challenge.

Thank you.

mazel li said:

we developed our own circuit board designed for QSPI NAND boot,

From your previous post it looks like you are using W25N02KV, is that correct?

https://www.winbond.com/hq/product/code-storage-flash-memory/qspinand-flash/?__locale=en&partNo=W25N02KV

Regards, Andreas

I need to clarify: The schematic primarily illustrates our circuit design intent, whereas the actual QSPI NAND chip implemented in the hardware is the ​​MT29F4G01ABBFDWB-IT:F​​.

www.micron.com/.../mt29f4g01abbfdwb-it-f

Ok thanks for clarifying. I'm out on PTO this week but will look at this again next week.

Regards, Andreas

Hi Andreas,

Just ping, any progress on this issue? 

-Thomas

mazel li said:

I did a test on EVM board, boot dialing code using boot0-boot15:(1100 0001 0011 0000),boot just prints the information in the picture.

I did some research internally and found several references to that the MT29F4G01flash was successfully verified on one of our AM62x devices previously. While there is no explicit reference to AM62L I don't believe at this time that there should be an issue with that particular device variant or any reason that this shouldn't work. Also, "Serial NAND" is mentioned to be the correct boot mode to be used. In the TI ROM context, QSPI is NOR flash.

In related discussions however in case of issues it was suggested to try setting the SPI transfer mode to 1-1-1 by setting bootmode bit 8, can you please try this on your end if it makes any difference.

Regards, Andreas

Hi，

I tested it. It's the same thing.

Ah ok, so it's actually booting all the way to SPL, that is great.

Can you share all (!!) your U-Boot device tree definitions related to &ospi0 (including associated pinmux device tree node) and your U-Boot .config file from your build folder?

Regards, Andreas

Hi，

The device tree is as follows, the deconfig is the same as in the release version of Ti and has not been modified additionally.

	ospi0_pins_default: ospi0-default-pins {
		bootph-all;
		pinctrl-single,pins = <
			AM62LX_IOPAD(0x003c, PIN_OUTPUT, 0) /* (D22) OSPI0_CLK */
			AM62LX_IOPAD(0x0068, PIN_OUTPUT, 0) /* (C20) OSPI0_CSn0 */
			AM62LX_IOPAD(0x0048, PIN_INPUT, 0) /* (C22) OSPI0_D0 */
			AM62LX_IOPAD(0x004c, PIN_INPUT, 0) /* (D21) OSPI0_D1 */
			AM62LX_IOPAD(0x0050, PIN_INPUT, 0) /* (E23) OSPI0_D2 */
			AM62LX_IOPAD(0x0054, PIN_INPUT, 0) /* (D23) OSPI0_D3 */
		>;
	};


&ospi0 {
	bootph-all;
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&ospi0_pins_default>;

	qspi0_nand: flash@0 {
		bootph-all;
		compatible = "spi-nand";
		reg = <0x0>;
		spi-tx-bus-width = <4>;
		spi-rx-bus-width = <4>;
		spi-max-frequency = <25000000>;
		cdns,tshsl-ns = <60>;
		cdns,tsd2d-ns = <60>;
		cdns,tchsh-ns = <60>;
		cdns,tslch-ns = <60>;
		cdns,read-delay = <4>;
		cdns,phy-mode;

		partitions {
			bootph-all;
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "qspi_nand.tiboot3";
				reg = <0x0 0x80000>;
			};

			partition@80000 {
				label = "qspi_nand.tispl";
				reg = <0x80000 0x200000>;
			};

			partition@280000 {
				label = "qspi_nand.u-boot";
				reg = <0x2c0000 0x400000>;
			};

			partition@680000 {
				label = "qspi_nand.env";
				reg = <0x700000 0x40000>;
			};

			partition@6c0000 {
				label = "qspi_nand.env.backup";
				reg = <0x780000 0x40000>;
			};

			partition@2000000 {
				label = "qspi_nand.rootfs";
				reg = <0x2000000 0x17e00000>;
			};

			partition@7fe0000 {
				bootph-all;
				label = "qspi_nand.phypattern";
				reg = <0x19e00000  0x5fc0000>;
			};
		};
	};
};

Thanks for the file. I'm currently working on a high-priority issue and it'll take me ~2 days before I can circle back here to look at this again more closely.

Regards, Andreas

Hi Andreas,

Do you have time to look at this issue again and any update on this issue? Thanks!

-Thomas

I reviewed the schematic extract shared earlier, the AM62L default U-Boot defconfig, as well as the provided device tree extract for compatibility plus the driver file micron.c in the U-Boot tree. All points to that MT29F4G01ABBFD should readily be supported and things should work for U-Boot/SPL.

1. Can you boot your custom board from another boot media, like SD card, UART, etc. to U-Boot prompt? It may be worth doing this, and then checking if you can access the QSPI NAND device from U-Boot prompt. This way we know whether it is a general issue with that SPI flash, or perhaps an issue specific to SPL. You can test accessing the SPI NAND from U-Boot like this...
   
   

   # This example is using the SK-AM62A board
   => mtd list
   List of MTD devices:
   * spi-nand0
     - device: flash@0
     - parent: spi@fc40000
     - driver: spi_nand
     - path: /bus@f0000/bus@fc00000/spi@fc40000/flash@0
     - type: NAND flash
     - block size: 0x40000 bytes
     - min I/O: 0x1000 bytes
     - OOB size: 128 bytes
     - OOB available: 80 bytes
     - 0x000000000000-0x000008000000 : "spi-nand0"
             - 0x000000000000-0x000000080000 : "ospi_nand.tiboot3"
             - 0x000000080000-0x000000280000 : "ospi_nand.tispl"
             - 0x000000280000-0x000000680000 : "ospi_nand.u-boot"
             - 0x000000680000-0x0000006c0000 : "ospi_nand.env"
             - 0x0000006c0000-0x000000700000 : "ospi_nand.env.backup"
             - 0x000002000000-0x000007fc0000 : "ospi_nand.rootfs"
             - 0x000007fc0000-0x000008000000 : "ospi_nand.phypattern"
   => mtd read ospi_nand.tiboot3 0x80000000
   Reading 524288 byte(s) (128 page(s)) at offset 0x00000000

   
   
   
   
2. You could apply below patch to U-Boot to get more details on the error that causes the boot to stop...
   
   

   $ git diff
   diff --git a/common/spl/spl.c b/common/spl/spl.c
   index 1ceb63daf31..356b929efa0 100644
   --- a/common/spl/spl.c
   +++ b/common/spl/spl.c
   @@ -747,11 +747,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
           ret = boot_from_devices(&spl_image, spl_boot_list,
                                   ARRAY_SIZE(spl_boot_list));
           if (ret) {
   -               if (CONFIG_IS_ENABLED(SHOW_ERRORS))
   -                       printf(PHASE_PROMPT "failed to boot from all boot devices (err=%d)\n",
   -                              ret);
   -               else
   -                       puts(PHASE_PROMPT "failed to boot from all boot devices\n");
   +               printf(PHASE_PROMPT "failed to boot from all boot devices (err=%d)\n", ret);
                   hang();
           }

   
   
   
3. Do you have a way to connect/debug using JTAG? That might be needed to better understand what's going on.

Regards, Andreas

HI，

1、SD card boot:

=> 
=> mtd list
List of MTD devices:
* spi-nand0
  - device: flash@0
  - parent: spi@fc40000
  - driver: spi_nand
  - path: /bus@f0000/bus@fc00000/spi@fc40000/flash@0
  - type: NAND flash
  - block size: 0x40000 bytes
  - min I/O: 0x1000 bytes
  - OOB size: 256 bytes
  - OOB available: 126 bytes
  - 0x000000000000-0x000020000000 : "spi-nand0"
	  - 0x000000000000-0x000000080000 : "ospi_nand.tiboot3"
	  - 0x000000080000-0x000000280000 : "ospi_nand.tispl"
	  - 0x0000002c0000-0x0000006c0000 : "ospi_nand.u-boot"
	  - 0x000000700000-0x000000740000 : "ospi_nand.env"
	  - 0x000000780000-0x0000007c0000 : "ospi_nand.env.backup"
	  - 0x000002000000-0x000019e00000 : "ospi_nand.rootfs"
	  - 0x000019e00000-0x00001fdc0000 : "ospi_nand.phypattern"
=> 

2、

NOTICE:  Booting Trusted Firmware
NOTICE:  BL1: v2.12.0(release):90ac40d85-dirty
NOTICE:  BL1: Built : 00:36:15, Apr 15 2025
NOTICE:  BL1: dram_class: 10
NOTICE:  lpddr4: post start - PI training status=0x29c02000 
NOTICE:  bl1_platform_setup DDR init done
NOTICE:  k3_bl1_handoff ENTERING WFI - end of bl1
NOTICE:  BL31: v2.12.0(release):90ac40d85-dirty
NOTICE:  BL31: Built : 00:36:15, Apr 15 2025
NOTICE:  0_ADC0's parent is 0
NOTICE:  0_ADC0's parent (after set_parent) is 2
ERROR:   Agent 0 Protocol 0x10 Message 0x7: not supported

U-Boot SPL 2025.01-gede7df3a2ca4 (May 27 2025 - 01:59:16 +0000)
SPL initial stack usage: 1872 bytes
SPL: failed to boot from all boot devices (err=-19)
### ERROR ### Please RESET the board ###

3、My development board doesn't use the JTAG interface, so I can't use it for now.

Can you confirm that the current version of the SDK11.00.05.02 supports QSPI booting, or was it the first version that didn't?

Thanks 

I'm on PTO this week but I will be picking up E2E support again next week. Thanks.

Hi Andreas Dannenberg

Do you have any update on the issue investigation?

-Thomas

SPL: failed to boot from all boot devices (err=-19)

Thanks for running the additional experiment. The error code -19 means "No such device" (ENODEV), which in the context of U-Boot often is related to issues with the device tree setup, or issues with the U-Boot configuration itself (drivers/features not activated needed for successful boot).

Since we already reviewed the device tree and I think it looks good, we should focus on the CONFIG situation.

mazel li said:

the deconfig is the same as in the release version of Ti and has not been modified additionally.

I just looked at the defconfig from SDK release 11.00.05.02, and it appears to be missing some of the definitions needed for NAND boot.

Can you try enabling the following CONFIG options and re-build U-Boot and re-try:

CONFIG_NAND_BOOT=y
CONFIG_QSPI_BOOT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_NAND_IDENT=y

# The below are probably needed to
CONFIG_SYS_NAND_U_BOOT_OFFS=0x280000
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

Regards, Andreas

Hi，

Sorry for the late reply,

I used sdk 11.00.15.05 for testing, I added these configurations and the logs are below:

NOTICE:  Booting Trusted Firmware
NOTICE:  BL1: v2.12.0(release):11.00.15-2-gea4525856-dirty
NOTICE:  BL1: Built : 09:03:06, Jul  8 2025
NOTICE:  BL1: dram_class: 10
NOTICE:  lpddr4: post start - PI training status=0x29c02000 
NOTICE:  bl1_platform_setup DDR init done
NOTICE:  k3_bl1_handoff ENTERING WFI - end of bl1
NOTICE:  BL31: v2.12.0(release):11.00.15-2-gea4525856-dirty
NOTICE:  BL31: Built : 09:03:06, Jul  8 2025
NOTICE:  SYSFW ABI: 4.0 (firmware rev 0x000b '11.0.12-v11.00.12 (Fancy Rat)')
ERROR:   Agent 0 Protocol 0x10 Message 0x7: not supported

U-Boot SPL 2025.01-00465-gf268435c7d00 (Jul 08 2025 - 10:07:33 +0000)
SPL initial stack usage: 1744 bytes
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

mazel li said:

I used sdk 11.00.15.05 for testing, I added these configurations and the logs are below:

Why does it no longer show the error code? Remember we added a change that added the code to the "SPL: failed to boot from all boot devices" line when it was printed...

I think it's still either 1 of the below 2 reasons why it doesn't work:

1. The CONFIG changes are not complete/correct, and/or not applied to the generated code
   
   
2. The device tree is missing the `bootph-all;` property on the ospi0 and/or any of the directly related nodes.

If you were to use JTAG it would be much easier to debug.,

Regards, Andreas

Hi，

I can start uboot, and I want to use nand commands under uboot, but I found that there is a dependency between CONFIG_CMD_NAND and CONFIG_NAND_OMAP_GPMC, but I don't have GPMC NAND, which prevents me from using nand commands in the uboot stage.

void board_nand_init(void)
{
	struct udevice *dev;
	int ret;

#ifdef CONFIG_NAND_OMAP_ELM
	ret = uclass_get_device_by_driver(UCLASS_MTD,
					  DM_DRIVER_GET(gpmc_elm), &dev);
	if (ret && ret != -ENODEV) {
		pr_err("%s: Failed to get ELM device: %d\n", __func__, ret);
		return;
	}
#endif

	ret = uclass_get_device_by_driver(UCLASS_MTD,
					  DM_DRIVER_GET(gpmc_nand), &dev);
	if (ret && ret != -ENODEV)
		pr_err("%s: Failed to get GPMC device: %d\n", __func__, ret);
}

#else

int board_nand_init(struct nand_chip *nand)
{
	return gpmc_nand_init(nand, (void __iomem *)CFG_SYS_NAND_BASE);
}

This command does not seem to work for spi nand, but for gpmc nand. So how do I load the kernel and device tree in nand when I boot with spi nand?

This is my defconfig, I want to compile out CONFIG_CMD_NAND by this.At the same time, I cannot delete the SPI configuration, otherwise I cannot start it.

CONFIG_ARM=y
CONFIG_ARM_SMCCC=y
CONFIG_ARCH_K3=y
CONFIG_TEXT_BASE=0x84000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SOC_K3_AM62L3=y
CONFIG_TARGET_AM62L3_EVM=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82b80000
CONFIG_SF_DEFAULT_SPEED=25000000
CONFIG_SF_DEFAULT_MODE=0
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am62l3-evm"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x85000000
CONFIG_SPL_TEXT_BASE=0x82000000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x82c80000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_STACK_R=y
CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_SYS_LOAD_ADDR=0x84000000
CONFIG_SPL_SIZE_LIMIT=0x50000
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x800
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_EFI_SET_TIME=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x83000000
CONFIG_BOOTSTD_FULL=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x58000
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
# CONFIG_SPL_BINMAN_SYMBOLS is not set
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_MTD=y
CONFIG_SPL_MTD_LOAD=y
CONFIG_SPL_NAND_SPI_SUPPORT=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_POWER_DOMAIN=y
# CONFIG_SPL_SPI_FLASH_TINY is not set
CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x2C0000
CONFIG_SPL_THERMAL=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_FUSE_WRITEBUFF=y
CONFIG_MMC_SPEED_MODE_SET=y
CONFIG_CMD_MTD=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_MTDPARTS=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_DEVICE_REMOVE=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_DFU_MTD=y
CONFIG_DFU_SF=y
CONFIG_DMA_CHANNELS=y
CONFIG_TI_K3_UDMA_AM62L=y
CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y
CONFIG_DA8XX_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_SPL_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_OMAP24XX=y
CONFIG_DM_MAILBOX=y
CONFIG_K3_SEC_PROXY=y
CONFIG_K3_FUSE=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_SPL_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_SPL_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_SPL_MMC_HS200_SUPPORT=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_SPL_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_SOFT_RESET=y
CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_S28HX_T=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_MT35XU=y
CONFIG_PHY_TI_DP83867=y
CONFIG_PHY_FIXED=y
CONFIG_TI_AM65_CPSW_NUSS=y
CONFIG_PHY=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_SINGLE=y
CONFIG_POWER_DOMAIN=y
CONFIG_DM_REGULATOR=y
CONFIG_SPL_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_DM_RTC=y
CONFIG_RTC_EMULATION=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
CONFIG_SOC_DEVICE_TI_K3=y
CONFIG_SOC_TI=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_CADENCE_QSPI_PHY=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_DM_THERMAL=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
CONFIG_SYS_MEM_TOP_HIDE=0x03800000
CONFIG_SYS_MTD_U_BOOT_OFFS=0x2C0000
CONFIG_CMD_NAND=y
CONFIG_MTD_RAW_NAND=y

#include <configs/am62x_a53_usbdfu.config>

Hi,

After I add the following configuration in defconfig, I can compile the nand command, but CONFIG_SPL_MTD_LOAD must be turned off. If it is turned on, the compilation will report an error. CONFIG_SPL_MTD_LOAD is required for my qspi nand startup. After turning it off, the qspi nand cannot be started. Why is there a conflict?

+CONFIG_CMD_NAND=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_OMAP_GPMC=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x1000
+CONFIG_SYS_NAND_OOBSIZE=0x100
+CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
+CONFIG_SPL_NAND_SUPPORT=y
+# CONFIG_SPL_NAND_AM33XX_BCH is not set
+CONFIG_SYS_NAND_U_BOOT_OFFS=0x2C0000
+CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_SPL_NAND_DRIVERS=y
+CONFIG_SPL_NAND_ECC=y
+CONFIG_SPL_NAND_BASE=y
+CONFIG_SPL_NAND_IDENT=y
+CONFIG_TI_GPMC=y
+CONFIG_MEMORY=y
+CONFIG_SPL_MEMORY=y
+
+CONFIG_SPL_MTD_LOAD=n
+CONFIG_SPL_THERMAL=n

I found the cause of this problem, it turns out that the size of SPI is limited. In order to not exceed the size specified by SPL, can "#include <configs/am62x_a53_usbdfu.config>" be deleted in am62lx_evm_defconfig?