AM625: DDR4 change inquiry

You shouldn't need to change anything from a hardware perspective.  For software, you will need to change the DDR configuration using the DDR register config tool: https://dev.ti.com/sysconfig/?product=Processor_DDR_Config&device=AM62x to configure for the new memory size.  Also consider this if you are using linux:  https://dev.ti.com/tirex/explore/content/am62x_academy_10_00_00_01/am62x_academy_10_00_00_01/source/linux/ch-porting/porting-uboot.html#modifying-ram-size

Regards,

James

Hello.

Thank you for your reply.

I would like to apply it first by simply changing 16Gb(2GB) -> 2Gb(512MB) in Sysconfig and then test it.

However, since the sdk version is 9.xx, the data in the Sysconfig file does not match. Are there any data that I need to change specifically?

The current version is confirmed to be 10.xx.

Please reply.
Thank you.

HI, i don't understand the data in Sysconfig does not match.  Can you show me what you are trying to do?

Regards,

James

Your Comment is based on sdk 10 or over.
However, we use sdk 9.

DDRSS_SDRAM_IDX, DDRSS_REGION_IDX 17 is not present in SDK 9.

Instead, I understand that in SDK 9, we need to change the following in k3-ddrss.c file, right?
writel(0x000001EF, ddrss->ddrss_ss_cfg + DDRSS_V2A_CTL_REG);

I modified the DDR size config and tested (2G -> 512MB)

However, the DDR size is not changed.

diff --git a/arch/arm/dts/k3-am625-sk.dts b/arch/arm/dts/k3-am625-sk.dts
index 859f038c376..4c0d8f2241c 100644
--- a/arch/arm/dts/k3-am625-sk.dts
+++ b/arch/arm/dts/k3-am625-sk.dts
@@ -45,7 +45,8 @@
 	memory@80000000 {
 		device_type = "memory";
 		/* 2G RAM */
-		reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
+		// reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
+		reg = <0x00000000 0x80000000 0x00000000 0x20000000>;
 
 	};
 
diff --git a/arch/arm/dts/k3-am62x-r5-sk-common.dtsi b/arch/arm/dts/k3-am62x-r5-sk-common.dtsi
index bd037773222..14f271a015f 100644
--- a/arch/arm/dts/k3-am62x-r5-sk-common.dtsi
+++ b/arch/arm/dts/k3-am62x-r5-sk-common.dtsi
@@ -20,7 +20,8 @@
 	memory@80000000 {
 		device_type = "memory";
 		/* 2G RAM */
-		reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
+		// reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
+		reg = <0x00000000 0x80000000 0x00000000 0x20000000>;
 		bootph-pre-ram;
 	};
 
diff --git a/arch/arm/dts/k3-am62x-sk-common.dtsi b/arch/arm/dts/k3-am62x-sk-common.dtsi
index 49f3c280e04..8746277602f 100644
--- a/arch/arm/dts/k3-am62x-sk-common.dtsi
+++ b/arch/arm/dts/k3-am62x-sk-common.dtsi
@@ -31,7 +31,8 @@
 	memory@80000000 {
 		device_type = "memory";
 		/* 2G RAM */
-		reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
+		// reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
+		reg = <0x00000000 0x80000000 0x00000000 0x20000000>;
 
 	};
 
diff --git a/arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi b/arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi
index d92e3ce048b..8c8e8861cc8 100644
--- a/arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi
+++ b/arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi
@@ -330,8 +330,8 @@
 #define DDRSS_CTL_314_DATA 0x00000000
 #define DDRSS_CTL_315_DATA 0x00000100
 #define DDRSS_CTL_316_DATA 0x01010000
-#define DDRSS_CTL_317_DATA 0x00000000
-#define DDRSS_CTL_318_DATA 0x3FFF0000
+#define DDRSS_CTL_317_DATA 0x00000202
+#define DDRSS_CTL_318_DATA 0x0FFF0000
 #define DDRSS_CTL_319_DATA 0x000FFF00
 #define DDRSS_CTL_320_DATA 0xFFFFFFFF
 #define DDRSS_CTL_321_DATA 0x000FFF00
@@ -513,7 +513,7 @@
 #define DDRSS_PI_74_DATA 0x00000000
 #define DDRSS_PI_75_DATA 0x00000005
 #define DDRSS_PI_76_DATA 0x01000000
-#define DDRSS_PI_77_DATA 0x04000100
+#define DDRSS_PI_77_DATA 0x04020100
 #define DDRSS_PI_78_DATA 0x00020000
 #define DDRSS_PI_79_DATA 0x00010002
 #define DDRSS_PI_80_DATA 0x00000001
diff --git a/drivers/ram/k3-ddrss/k3-ddrss.c b/drivers/ram/k3-ddrss/k3-ddrss.c
index 7e445d2b737..6263464d20e 100644
--- a/drivers/ram/k3-ddrss/k3-ddrss.c
+++ b/drivers/ram/k3-ddrss/k3-ddrss.c
@@ -626,7 +626,8 @@ static int k3_ddrss_probe(struct udevice *dev)
 
 #ifdef CONFIG_K3_AM64_DDRSS
 	/* AM64x supports only up to 2 GB SDRAM */
-	writel(0x000001EF, ddrss->ddrss_ss_cfg + DDRSS_V2A_CTL_REG);
+	//writel(0x000001EF, ddrss->ddrss_ss_cfg + DDRSS_V2A_CTL_REG);
+	writel(0x000001AF, ddrss->ddrss_ss_cfg + DDRSS_V2A_CTL_REG); // 512 MB
 	writel(0x0, ddrss->ddrss_ss_cfg + DDRSS_ECC_CTRL_REG);
 #endif
 

Below is the test result

=> bdinfo
boot_params = 0x0000000000000000
DRAM bank   = 0x0000000000000000
-> start    = 0x0000000080000000
-> size     = 0x0000000080000000
flashstart  = 0x0000000000000000
flashsize   = 0x0000000000000000
flashoffset = 0x0000000000000000
baudrate    = 115200 bps
relocaddr   = 0x00000000ff61b000
reloc off   = 0x000000007ee1b000
Build       = 64-bit
Could not get PHY for ethernet@8000000port@1: addr 0
am65_cpsw_nuss_port ethernet@8000000ethernet@8000000port@1: phy_connect() failed
Could not get PHY for ethernet@8000000port@1: addr 0
am65_cpsw_nuss_port ethernet@8000000ethernet@8000000ethernet@8000000port@1: phy_connect() failed
current eth = unknown
ethaddr     = (not set)
IP addr     = <NULL>
fdt_blob    = 0x00000000fd5ebf20
new_fdt     = 0x00000000fd5ebf20
fdt_size    = 0x000000000000fe60
Video       = dss@30200000 inactive
multi_dtb_fit= 0x0000000000000000
lmb_dump_all:
 memory.cnt  = 0x1
 memory[0]      [0x80000000-0xffffffff], 0x80000000 bytes flags: 0
 reserved.cnt  = 0x5
 reserved[0]    [0x9ca00000-0x9cafffff], 0x00100000 bytes flags: 0
 reserved[1]    [0x9cb00000-0x9e6fffff], 0x01c00000 bytes flags: 4
 reserved[2]    [0x9e780000-0x9fffffff], 0x01880000 bytes flags: 4
 reserved[3]    [0xfc5e6000-0xffffffff], 0x03a1a000 bytes flags: 0
 reserved[4]    [0xfd5e69d0-0xffffffff], 0x02a19630 bytes flags: 0
devicetree  = separate
arch_number = 0x0000000000000000
TLB addr    = 0x00000000ffff0000
irq_sp      = 0x00000000fd5eaff0
sp start    = 0x00000000fd5eaff0
Early malloc usage: 3b40 / 8000

Hi Inseok,

Please run the following commands on the U-Boot prompt to check the memory configuration in U-Boot devicetree:

=> print fdtcontroladdr
=> fdt addr $fdtcontroladdr
=> fdt list /memory@80000000

Below are the results of testing as you mentioned.

I obviously modified the DDR settings in the dts file, but I don't know why the change doesn't work.

=> print fdtcontroladdr
fdtcontroladdr=fd5ebf20
=> fdt addr $fdtcontroladdr
Working FDT set to fd5ebf20
=> fdt list /memory@80000000
memory@80000000 {
  device_type = "memory";
  reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
  bootph-pre-ram;
};

Go to your U-Boot build directory, find the dtb files:

r5/arch/arm/dts/k3-am625-sk.dtb
a53/arch/arm/dts/k3-am625-sk.dtb

then use dtc command to convert the dtb back to dts and check the memory size in memory@80000000 node to see if the value is correct.

for example:

dtc -I dtb ./r5/arch/arm/dts/k3-am625-sk.dtb | less

Below is the result.

Isn't the dtb file included in u-boot.img? Do I need to install the dtb file separately like the Kernel?

There are 2 dtbs as I mentioned, one in r5 directory and the other in a53 directory. Do both have the same correct size 0x20000000?

There are 2 dtb files, as you mentioned.

Do they both have the same size 0x20000000 in their memory node?

Please do the same memory size check on the follow two dtb files.

r5/u-boot.dtb
a53/u-boot.dtb

two dts files is same for memory node.

[12:24:01] ischoi@Lenovo $ dtc -I dtb ./r5/arch/arm/dts/k3-am625-sk.dtb | less

....

        memory@80000000 {
                device_type = "memory";
                reg = <0x00 0x80000000 0x00 0x20000000>;
                bootph-pre-ram;
        };

....



[12:24:01] ischoi@Lenovo $ dtc -I dtb ./a53/arch/arm/dts/k3-am625-sk.dtb | less
...

        memory@80000000 {
                device_type = "memory";
                reg = <0x00 0x80000000 0x00 0x20000000>;
                bootph-pre-ram;
        };
....

What is the exact version of the SDK9.x you used?

My SDK Version is 09.00.00.03

Please check the compiling timestamp in the U-Boot console message and ensure you are indeed running the U-Boot binaries you just compiled?

For example:

U-Boot SPL 2023.04-gb0d717b732 (Dec 06 2023 - 15:11:45 +0000)

There is a U-Boot console message below.

U-Boot SPL 2023.04-g24098ea90d (Jul 06 2023 - 12:59:40 +0000)

Inseok Choi said:

(Jul 06 2023 - 12:59:40 +0000)

Now it is 2025, apparently you are not using the U-Boot binaries that you just compiled now?

I checked again, but there were no problems with the build.
I am testing by only replacing the u-boot.img file after building.