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AM62A7: Fast start of camera using R5?

Evan
Prodigy 111 points
Part Number: AM62A7

Tool/software:

The thread below has useful information on where each part of the vision pipeline is normally handled (R5 vs A53). 

My question is: if we wish to have the fastest possible presentation of video from one MIPI camera to the display, prior to Linux booting, could this be fully implemented on R5 including frame handling?  Is there a technical or practical limitation to prevent that?

Or is this better to handle in the QNX way, where the necessary drivers are loaded on R5 and A53 respectively, but prioritized ahead of the rest of the system.

Our target for video to the screen is 1 second from power on.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1441666/am62a3-q1-sitara-r5f-video-qnx-camera-initialization-frame-grabbing-signal-handling-to-run-on-device-management-r5f-core-or-mcu-r5f-core-ffi/5532742?tisearch=e2e-sitesearch&keymatch=MCU%2B%20camera#5532742

  • 0
    TI__Guru 59255 points

    Hello Evan,

    Evan said:
    My question is: if we wish to have the fastest possible presentation of video from one MIPI camera to the display, prior to Linux booting, could this be fully implemented on R5 including frame handling?  Is there a technical or practical limitation to prevent that?

    Thanks for the question and it is a good one. A simple answer is yes. The MIPI CSI capture can be implemented on the DM R5 core, in addition to the ISP driver that is already running on DM R5. This is similar to the SW architecture on TDA4 platforms where frame grabbing and processing is done on an MCU R5.

    Regards,

    Jianzhong