AM62L-PROCESSOR-SDK: How to set Efuse Bootmodes?

Hi Dominik,
1/. do we have full bootmode strap pin(16) or reduced bootmode strap pin(4) available on your board?
2/. what are primary boot mode & backup boot mode to be configured on your board?
3/. what type of memory boot media (eMMC, (x)SPI etc... ) available on your board?
You'll find reduced boot mode info in "5.3.2 BOOTMODE Pin Mapping (Reduced Pincount)" in AM62L TRM
Best,
-Hong

Hi Hong!

We're using the reduced pincount for the bootmodes and we have the 4 pins available on a dip switch just like on the EVM. The default bootmode with weak resistors is eMMC with SD-Card as backup.

We have all the boot media available except OSPI NAND.

But I'm interested in how to program the Efues to overwrite those two boot modes:

Hi Dominik,
Thanks for your reply.
1/. I think you'll want to configure primary boot mode as "eMMC UDA/FS" to workaround the PG1.0 Errata i2473. Is my understanding correct?
2/. What is the backup boot mode when primary one is "eMMC UDA/FS"?
3/. Do we have VPP pin connection which is SW configurable "ON/OFF" with 1.8v supply on your board?

The reduced boot mode efuse writer is currently under development, and not ready for external release yet.
I'm trying to get the release schedule, and will explore any other alternative options...
Best,
-Hong

Hello Hong.

1) Yes you're right. We're interested in the fuseable bootmodes for series production too. But using one of them to boot reliable from eMMC until the fixed silicon is available would be most important now. As per my understanding: Booting reliable from eMMC using reduced bootmode pincount is not possible as we can't select eMMC FS boot without the full pincount.

2) Backup for "eMMC UDA/FS" should be "MMC1 4b UDA FS (SD-Card)"

3) Yes, we can enable eFuse VPP with "(D18) OSPI0_CSn2.GPIO0_13"

Thanks

Dominik

Hi Dominik,
Thanks for your reply.
Here is one of options we're currently exploring internally on the reduced boot mode efuse writer.
1/. The core efuse programming service is provided by TIFS/SYSFW via the new TISCI boot mode efuse programming API.
2/. The new TISCI boot mode efuse programming API is called by u-boot with
- VPP “ON/OFF” control/configuration
- serial terminal configuration etc...

The example flow on running u-boot based boot mode efuse writer on customer board
a/. configure backup boot mode with the reduced bootstrap pin (4), for example,
- select USB-DFU as backup boot mode with BOOTMODE[15:12]=1000 (Fixed 1 mode)
- select SD as backup boot mode with BOOTMODE[15:12]=1011 (Fixed 4 mode)
b/. boot the u-boot based boot mode efuse writer from the selected backup boot mode
c/. program the boot mode efuse (either Efuse Bootmode1 or Efuse Bootmode2) with the new value for the new intended primary/backup boot modes
Once the new reduced boot mode efuse is programmed successfully
d/. reconfigure the reduced bootstrap pin (4) to select either Efuse Bootmode1 or Efuse Bootmode2
- BOOTMODE[15:12]=0110 to select Efuse Bootmode1
- BOOTMODE[15:12]=0111 to select Efuse Bootmode2
e/. boot SW...

1/. Do you have any questions on the proposed option and flow?
2/. when is your need date on the reduced boot mode efuse writer?
In parallel, I'm checking internally on the schedule estimate on the u-boot based reduced boot mode efuse writer.

Best,
-Hong

Hello Hong,

1) Is my understanding correct that this new "eFuse writer" will be running as a tool within U-boot instead of replacing the tiboot3.bin like the keywriter tool for the other K3 devices with R5 core does?

2) As soon as you can provide it. We'd like to run climate chamber tests using the eMMC as boot source.

Thanks

Dominik

Hi Mukul,

I think we can either keep this thread in case questions come up when the tooling is ready or I can just open a new one.

Thanks

Dominik