Once again, please help me with THS8200->VGA using existing VPIF, V4L2, and driver code.

I've gotten all the hooks into place, due to the apparent necessity to upgrade VPIF and V4L2 source code to support VGA (640x480 60Hz) output from the THS8200.  All that's left is to figure out the correct (or missing) values for two array entries. My top end application is derived from the decode demo and works when command line parameters are chosen for an existing non-VGA display format.

I would sincerely appreciate your help in figuring out what's needed in these tables, or else an answer for the totally alternate way to go about this!  

SOURCE CODE git/drivers/media/video/davinci/vpif_display.c

New entry to table static const struct vpif_channel_config_params ch_params[].  I believe the bold black are correct, but I could be mistaken.  But the bold magenta surely need adjusting; they were simply copied from another entry.

{ // Added by HgF

"VGA 640x480 60Hz", 
640, /*width*/
480, /*height*/
60, /*Hz*/
1, /*progressive*/
0, /*0=y/c not muxed, use 2 channels.  1=y/c muxed, use 1 channel.*/
136, /* length of eav 2 sav */
720, /* length of sav 2 eav */
1, /* l1 */
45, /* l3 */
621, /* l5 */
0, /* l7 */
0, /* l9 */
0, /* l11 */
625, /* vsize ??? 525 causes streaming to hang, regardless of clk_rate */
0, /* capture_format */
0, /* no vbi */
0, /* hd_sd */
V4L2_STD_VGA640x480_60, 
25175000 /* clk_rate ??? scope doesn't show this clock anywhere, such as coming out of CDCE949 */

} // Added by HgF

SOURCE CODE git/drivers/media/video/ths8200.c

New entry to table static const struct ths8200_mode_info mode_info[].  I believe the bold black are correct, but I could be mistaken.  But the bold magenta surely need adjusting; they were simply copied from another entry.

/* VGA Modes - added by HgF */
{

V4L2_STD_VGA640x480_60, /* "std". Standard added by HgF, for doing VGA at 640x480 pixels, 60Hz frames, VESA compatible */
THS8200_INTF_16BIT_RGB, /* "input_intf".  Interface 16-Bit RGB 4:4:4 Data Format (THS8200 datasheet figure 4-3) */
THS8200_VESA_MASTER /* "mode".  THS8200 originates timing in master mode */
525, /* "frame_size" */
525, /* "field_size" */
800, /* "pixels_per_line" */
0, /* "hs_in_delay" */
0x2C, /* "negative_hsync_width" */
0x2C, /* "positive_hsync_width" */
0x84, /* "hfront_porch" */
0x58, /* "hback_porch" */
0xC0, /* "vfront_porch" */
0x00, /* "pulse_duration" */
0x00, /* "full_line_pulse_duration" */
0x58, /* "vback_porch" */
0x00, /* "dtg_spec_k1" */
0 /* "vs_in_delay" */

}