PROCESSOR-SDK-J784S4: Setup PCIe downstream interrupt

Tool/software:

Hi experts,

I am using the J784S4 SDK10.

I am trying to setup the PCIe Core Downstream Interrupts as explained in the TRM 12.2.3.3.4.3.1

What I have done : 

1. setup the CLEC event 345 (=CSLR_COMPUTE_CLUSTER0_CLEC_SOC_EVENTS_IN_PCIE0_PCIE_DOWNSTREAM_PULSE_0) to the C7x_0 interrupt 40
2. setup the C7x interrupt
3. enable the PCIe core downstream_0 (=PCIE_CORE_PCIE_INTD_CFG_INTD_CFG_enable_reg_sys_0)

Why I need your help :

I can't find the PCIE_CORE_PFn_I_VENDOR_SPECIFIC_CONTROL_REG addr in the "J784S4_register_Public_20250116" to trigger the downstream interrupt.

I found few post which explain how to do it on J721e.

So I looked at the J721e registers and PCIE_CORE_PFn_I_VENDOR_SPECIFIC_CONTROL_REG exist for this processor.

Could you give me the address or the register name for the J784S4.

If I am correct I don't have to setup the interrupt router (as for GPIO) because the PCIE0 instance is connected to the CLEC.

Thanks for your help

Charles