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AM387x/TI814x/DM814x PINCNTLx register description?

Kyle Manna
Intellectual 420 points

Hi,

 

I've looked through the TRM and Datasheet for a description the PINCNTLx register and haven't found one.  Based on the code written in the PSP and the code generated by TI's pin mux utility, the PINCNTLx registers on the TI814x are different then the PINCTRLx registers on the TI816x which does describe the register.

 

Specifically, I'd like to know what bit 19 means as some pins come out of reset with that bit set.

  • 0
    TI__Intellectual 2930 points

    From the mux.h, generated by the Mux Tool I see that it en-/disables the receiver.

    IDIS - Receiver disabled
    IEN - Receiver enabled

    #define IDIS (0 << 18)
    #define IEN (1 << 18)

    #define PINCNTLx                               0x0xxx

    #define MUX_VAL(OFFSET,VALUE)\
        writel((VALUE), TI814X_CTRL_BASE + (OFFSET));

    e.g.:
    MUX_VAL(PINCNTLx, (IEN | IPD | DISABLED ))

  • 0 in reply to Ewald Schan
    Intellectual 420 points

    I saw that, but I'm concerned with bit 19 (ie 1<<19) which the u-boot PSP has set coming out of reset. Additionally the bit is explictly set when configuring the CPSW, see @ http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=blob;f=board/ti/ti8148/evm.c#l549

    What is bit 19?  If I had to guess based on experience with OMAP3 platforms, I'd guess it is a "WAKE_EN" bit or similar, but would like to know for sure and see documentation that describes this rather then just guessing.

     

    Thanks

     

     

  • 0 in reply to Kyle Manna
    TI__Intellectual 2930 points

    Sorry my fault, Bit 19 is 1<<19 of course. For some pads it is the SLEWCTRL and selects faster (0) or slower (1) slew rate,
    However I miss the documentation, too.

    Can someome help where we can find the documentation of Bit19?