This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RFID chip: TRF7960 spi protocol driver in Linux

Other Parts Discussed in Thread: TRF7960

Hi:

 

I am developing the spi protocol driver in Linux for TRF7960. After some customization on the spi master device driver, I can read and write TRF7960' s registers.

My goal is to read the uid of a credit card, so I referred to this document: SLOA136 - Implementation of ISO14443A Anti Collision Sequence in the TI TRF796x

 

What I have done is:

1. set registers:

reg00(Chip status control)  =  21  

reg01(ISO control) =  88

 

2. Send REQA Command:

I sent 2 data arrays:  8f 91 97 3d 00 10,  3f 26 00.  I also tried one array  8f 91 3d 00 10 26, but it doesn't always work.

 

What I got:

I could always see the end of TX (bit 7) on register 0C(IRQ status) which made me happy. However, The other bits confuse me:

START of RX (bit 6):  sometimes it is set when there is no card around, but most of time when I placed a credit card on the chip,  it was not set. 

SIGNALS of FIFO (bit 5): sometimes is was set, so I went check the FIFO status register (1C). It kept changing. When I read the fifo, the count of the FIFO doesn't decrease by 1.

 

Here are my questions:

1. What is the correct settings to communicate with ISO 14443A promixity cards?

2. Is there a working Linux protocol device driver to TRF7960, so I can use it  to read a credit card or compatible promixity cards?

 

Thanks

Kevin

 

 

  • Hi Kevin,

    I would suggest taking a look at our logic analyzer shots to help clear this up. 

    LA Shots: http://www.ti.com/litv/zip/sloc240

    Your register settings are correct, but it seems your TX string is not.  You will see in our shots, we use 0x8F, 0x90, 0x3D, 0x00, 0x0F, 0x26.  After the first IRQ, you should read the IRQ Status register and receive a 0x80(TX Complete).  Be sure to reset after receiving this with a 0x8F.  The next IRQ should result in a reading a 0x40 to indicate RX has started.  The FIFO is now ready to read.       

    We are working on a Linux driver for the ePOS reference design linked below, but it is not ready at this time.

    http://www.ti.com/general/docs/gencontent.tsp?contentId=139132      

    Also, are you trying to make a payment terminal?  If so, you will need to make sure you can pass the EMV certification.