Tool/software:
Hello everyone,
We have designed our own hardware based on the AM64x. Unlike the EVM, the design does not include a clock buffer for PCIe, so we need to generate the clock from the AM64 itself.
We have identified the following configuration in the device tree:
ti,syscon-pcie-refclk-out:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: Phandle to the SYSCON entry
- description: lock2_kick0 register offset within SYSCON
- description: lock2_kick1 register offset within SYSCON
- description: acspcie_ctrl register offset within SYSCON
- description: pcie_refclk_clksel register offset within SYSCON
- description: clock source index to source ref clock
description: Specifier for enabling the ACSPCIE clock buffer for reference clock output.
We would like to know where the different offsets are defined. On https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1340937/am68a-enable-internal-pcie-clock an xlsx is referenced. Can we use it for am6442 or is there any for am6442 ? Could someone please point me to the location of this file or provide any other relevant information?
Thank you in advance for your help!
Best regards,
Rémi