AM625SIP: Connecting multiple ADC on AM625SIP

I do not believe we have any specific refrence or examples. OSPI is not intended for use as general purpose serial port etc, so you will need to evaluate SPIs, McASP as potential options 

Additionally there is a potential of using the PRU on AM62 for ADC attach, you can see some references of that in AM64 collateral, I do not believe we have done anything specific to enable that on AM62 yet. 

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1300144/processor-sdk-am64x-pru-16-bit-input-capture

Hello,

Questions about your usecase

Are there specific requirements for these ADC samples? e.g., do samples from one ADC need to be captured within a specific time relative to samples from another ADC?

I often see ADCs that are capable of sampling up to 500kSPS that will actually sample much slower in the design (e.g., 32ksps or 40ksps). What is the actual sample rate that your design needs? (for example, a 50 HZ waveform that needs 640 samples per period will have a sample rate of 32kSPS)

Finally, how are you actually going to use this data? Do you expect Linux to actually sift through and analyze every single datapoint? Is this more like "overvoltage" detection, where it might make sense for a non-Linux core to do some minimal data processing and just notify Linux or take some steps if an overvoltage event is detected? etc.

More background on PRU <--> ADC 

We do not have any examples specifically for PRU <--> ADC on AM62x yet, but this is a usecase that has been explored on both AM64x (as per Mukul's link above), and AM335x (which has significantly fewer PRU cores than AM64x, running significantly slower than the PRU cores on AM62x can run). 

AM64x links:
https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/11_00_00_15/exports/docs/api_guide_am64x/DRIVERS_PRU_ADC.html
https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/11_00_00_15/exports/docs/api_guide_am64x/EXAMPLES_PRU_ADC.html 
Looks like the examples range from 32kSPS x 8 differential inputs that are 24 bits, to 1.0677 MSPS with 24 bits

AM335x links:
https://www.ti.com/tool/TIDA-01555 > specifically check out the "design guide"
example is 32kSPS x 8 channels x 6 ADCs at 16 bits

Regards,

Nick

Nick Saulnier said:

Are there specific requirements for these ADC samples? e.g., do samples from one ADC need to be captured within a specific time relative to samples from another ADC?

I often see ADCs that are capable of sampling up to 500kSPS that will actually sample much slower in the design (e.g., 32ksps or 40ksps). What is the actual sample rate that your design needs? (for example, a 50 HZ waveform that needs 640 samples per period will have a sample rate of 32kSPS)

Finally, how are you actually going to use this data? Do you expect Linux to actually sift through and analyze every single datapoint? Is this more like "overvoltage" detection, where it might make sense for a non-Linux core to do some minimal data processing and just notify Linux or take some steps if an overvoltage event is detected? etc.

Each channel are independent and can be sampled successively. Channel sampling rate must be 500kSPS. There is 2 options :

- Using a parallel ADC converting 11 channel simultaneously at 500kSPS

- Using an analog MUX and a faster ADC to convert successively the 11 channels. In this case ADC SR should be 11*0.5=5.5MSPS

Any intermediate solution is acceptable (2x 6 channels 3MSPS  ADC, or 4x 3 channels 1.5MSPS ADC...).

ADC channel reconfiguration takes time. The best scheme is to preconfigure all ADCs and starts the conversions with a hardware trigger (timer output).

The data will be pre-processed (some basic statistics: average - min - max search and thresholds check) by the Cortex M4. Linux will only have to process statistical data at 10Hz.

Actually, this is working well with a RPI + external CPU with enough ADC inputs. I have to make this design more "industrial" and ideally, suppress the external CPU.

Hello Nicolas,

Out of curiosity, what is the current ADC topology with the RPI (I assume raspberry Pi?) + external CPU?

I am sending your thread to another team member to discuss what kinds of frequencies are supported with the SPI peripheral, and what functionality is supported in the M4F driver. Feel free to ping the thread if you do not get a response within a few days.

Regards,

Nick

Greetings Nicolas,

To see the supported frequencies for MCSPI please see the following FAQ response: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1414084/faq-sk-am64b-mcspi-integration-guide/5428535#5428535

Regards,

Vaibhav

Nick Saulnier said:

Out of curiosity, what is the current ADC topology with the RPI (I assume raspberry Pi?) + external CPU?

The RPI is a raspberry pi compute module 3+ (4x Cortex A53 @ 1.2GHz + a few GB DDR2).

Associated CPU is a STM32H7 with 3 integrated ADC, each one sampling 3-4 channels.

Thank you all for the many links you have provided. It makes me a little bit of good reading :)

Hi Nicolas,

If you need more information on the MCSPI front, I am happy to help you. The FAQ in general covers the getting started for MCSPI and steps on how to integrate it in your custom application along with details on Frequency and other fronts.

Please give all of these links a read and get back to us with doubts if any.

Regards,

Vaibhav