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Original question:

DRA821U: DA821

DRA821U: DRA821

Jitendra rana
Intellectual 370 points
Part Number: DRA821U

Tool/software:

Hi Team,

As using DRA821U4 evaluation board for make a proof of concept for our project, to make own board based on DRA821U4, we need to customize schematic. Could you help us to customize memory size (Both volatile & non-volatile). 

Thanks,

Jitendra

  • 0
    TI__Guru**** 163230 points

    Hello Jitendra,

    If you want to reduce DDR size then we would recommend 1 GB if you are planning to Boot Linux.

    Flash(OSPI NOR) size we recommend is 64 MB. eMMC can be any size upto 32 GB.

    - Keerthy

  • 0 in reply to Keerthy J
    Intellectual 370 points

    Hi Keerthy,

    Query-1

    Could you share connectors pins to pins mapping details between J721EXCP01EVM & J7200XSOMG01EVM.

    query-2

    At Jacinto board J721EXCP01EVM, regarding MCAN0_Tx and MCAN0_Rx (IC U70 & J27), these pins ending at J20E (pin-E14) and J20D (pin-D13). now problem is that we are not able to find where these pins connecting at processor board J7200XSOMG01EVM. Please confirm the same.

    Thanks,

    Jitendra

  • 0 in reply to Jitendra rana
    TI__Guru**** 163230 points

    Hello Jitendra,

    I am looping our board design experts.

    Best Regards,

    Keerthy 

  • 0 in reply to Keerthy J
    TI__Guru 52335 points

    I am sorry, we do not have a document specifically mapping the pins between the J7200 SOM and the Common Processor Board.  The EVM User guide provides some details on which interfaces are used from the processor, and schematic can be used to trace those interface(s) on the CPB.  

    The connectors mate like this:

    CPB J19 <-> SOM J6

    CPB J20 <-> SOM J5

    Regarding your specific query....(CPB <-> SOM)

    MCAN0_TX (pin J20.e14)  <-> MCAN3_TX (pin J5.e14)

    MCAN0_RX (pin J20.d13) <-> MCAN3_RX (pin J5.d13)