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AM62A7-Q1: Is the AM62A SDK set up to use the Power On memory region referenced in the watchdog driver?

Part Number: AM62A7-Q1

Tool/software:

Hi ,

The newer AM62A watchdog driver has support for a Power On memory region, which is used to get the reboot reason.

Is it possible to use this on the AM62A, and if so, what changes do I need to make to make use of them?

I need to use the reboot reason in my application, and would like to use this as the mechanism to get it.

Regards,

Bas Vermeulen

  • Hello Bas,

    Just to clarify, when you say "reason" in the initial question, do you mean to say "region"? If so I will edit the post.

    Please describe for me how you are hoping to use the power on memory region.

    Regards,

    Nick

  • If I understand the rti_wdt driver correctly, the power on memory region can be used to get the reboot reason (at least that's what it is used for in the driver).

    I need to know why the board rebooted, to keep track of the number of times we had a watchdog reset. I would like to use the watchdog driver to do this, preferrably in such a way as to not actually trigger the watchdog.

    In order to be able to do so, I need to configure the power on memory region in my device tree. I haven't seen this configured for the AM62A, and am unsure whether this needs additional support in the the bootloader(s) to make this happen.

    I would like to get clarification on how to configure the power on memory region for the AM62A, and what changes are needed (if any) in the bootloader(s) and device tree to make this work correctly.

    Regards,

    Bas Vermeulen

  • Hello Bas,

    Ahh, thank you for the clarification. I am blocking off my afternoon tomorrow to dig into watchdog, will provide responses on both threads then.

    Regards,

    Nick

  • Looking forward to your reply!

    Regards,

    Bas

  • Hi Nick,

    Were you able to get some progress in this topic?

    Bas

  • Hi ,

    Just giving you a ping as requested.

    Bas

  • Hello Bas,

    Thank you for the pings.

    Watchdog driver code 

    I assume you are referring to this part of the rti_wdt_probe function:

            node = of_parse_phandle(pdev->dev.of_node, "memory-region", 0);
            if (node) {
    ...
                    /*
                     * If reserved memory is defined for watchdog reset cause.
                     * Readout the Power-on(PON) reason and pass to bootstatus.
                     */
                    paddr = res.start;
                    reserved_mem_size = resource_size(&res);
    ...
                    vaddr = memremap(paddr, reserved_mem_size, MEMREMAP_WB);
                    if (!vaddr) {
                            dev_err(dev, "Failed to map memory-region.\n");
                            ret = -ENOMEM;
                            goto err_iomap;
                    }
    
                    if (vaddr[0] == PON_REASON_SOF_NUM &&
                        vaddr[1] == PON_REASON_MAGIC_NUM &&
                        vaddr[2] == PON_REASON_EOF_NUM) {
                            wdd->bootstatus |= WDIOF_CARDRESET;
                    }
                    memset(vaddr, 0, reserved_mem_size);
                    memunmap(vaddr);
    

    and the memory-region defined in the bindings documentation:
    https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml?h=ti-linux-6.12.y#n37

    So... This is going to take a bit of time to look into. At a glance, I do not actually see how this arbitrary memory allocation in DDR would work.

    First off, in the probe function we can see that the driver is only looking for 12 specific bytes that are supposed to indicate a watchdog reset. bootstatus is not updated if there are any other values in the memory region. So it would only be able to say if a watchdog reset occurred, not any other reset source.

    But some other driver code would need to know that the user allocated that specific DDR region to hold a reset value, and then write the 12 magic bytes to the DDR region during a watchdog reset event. I do not see that memory region getting used anywhere, so I do not know how those 12 bytes would even get written to DDR in the first place.

    I could be missing something. I am reaching out to some other team members for ideas.

    Other options for seeing reset reason

    Does this section from the TRM describe the functionality you are looking for?

    "Reset Source Status Registers"
    register WKUP_CTRL_MMR1_RST_SRC

    Regards,

    Nick

  • Hi NIck,

    Yes, that was the watchdog driver code I was looking at. I need to know whether we had a watchdog reset for one of my requirements/functionalities, and this would fit the bill if it's (supposed to be) working.

    The register WKUP_CTRL_MMR1_RST_SRC is what I currently use with devmem2 to get the reset status. This works from the command line, but I would like something readily available to userspace (without having to recreate devmem2 in my application).

    Another option would be to read that from u-boot and update my kernel command line with the reboot reason.

    Regards,

    Bas Vermeulen

  • Hello Bas,

    More information

    Ok, it looks like that "DDR memory region" implementation is a workaround specifically for AM65x since it does not have a register with the reset reason like AM62, AM62A, AM64, etc. Some background that we were able to find:

    https://lore.kernel.org/lkml/20230713095127.1230109-1-huaqian.li@siemens.com/
    https://github.com/siemens/k3-rti-wdt/issues/1

    As far as I can tell, it does not look like there is a general Linux driver for reading all the values in the RST_SRC.

    If all you need is to know whether the watchdog is the thing that caused the last warm reset, and you were comfortable with some kernel hacking, it looks like this functionality to read ONLY the watchdog bit of the register was implemented in the AM335x driver omap_wdt.c's probe function. You can find some earlier discussions about that here: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/896469/am3352-reason-for-last-reboot 

    Things to keep in mind when doing your own programming

    Some things to keep in mind if you are programming code to interact with this register:

    1) The bit values persist across reboots. So every time you read a bit from the RST_SRC register, you need to clear the value of the bit after reading from it (by writing a 1 to that particular bit that you are processing). Otherwise you can get false positives on later boots.

    2) You can only write to the register in the MCU domain, not the shadow register in the WKUP domain.

    I filed a couple bugs against the AM62Ax TRM today since section "Reset Source Status Registers" has the wrong register names, and states that the registers are in the MCU and MAIN domains instead of the MCU and WKUP domains. In the current version of the AM62Ax TRM, the registers you are looking for are MCU_CTRL_MMR0_RST_SRC and WKUP_CTRL_MMR0_RST_SRC

    You can find the tests I ran with directly reading and writing to the registers on AM62x here:
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1512681/am623-reset-reason-not-available-in-sdk/5826267#5826267 

    Regards,

    Nick

  • Thanks Nick, that answered my question.