This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PROCESSOR-SDK-AM62A: Need to set up a OSPI Cyclic DMA Transfer that is GPIO Triggered

Part Number: PROCESSOR-SDK-AM62A

Tool/software:

I restarted this post and hopefully, I can make some progress.  From the previous post, I did not get an answer as for the level of the GPIO to trigger the DMA transfer.  I currently am using an interrupt pin that asserts low and stays low until data in the IP's FIFO has been read to cross a threshold.  Can this pin be used to trigger the DMA transfer or do I need to invert the signal.

Since the DMA transfer is in cyclic mode, do I need to add this statement   "dmas = <&main_bcdma 1 0 0>;" in the .dts file?

I will look at the previous post and maybe I can figure out how to add the GPIO triggered DMA transfer.

I am sure I will have more questions later on.

Thanks,

Victor

  • Hi Victor,

    I am out of office today. I will check on this and reply with details on Monday.

  • Hi Victor,

    From the previous post, I did not get an answer as for the level of the GPIO to trigger the DMA transfer.  I currently am using an interrupt pin that asserts low and stays low until data in the IP's FIFO has been read to cross a threshold.  Can this pin be used to trigger the DMA transfer or do I need to invert the signal.

    The AM62Ax L2G module (which routes the GPIO event to DMA) only captures the rising edge. The falling edge is ignored. So likely you would need to revert the GPIO signal.

    Since the DMA transfer is in cyclic mode, do I need to add this statement   "dmas = <&main_bcdma 1 0 0>;" in the .dts file?

    Yes. The '1' in the setting specifies global event #1 which is what is used in the DMA driver for listen to GPIO events.

    I will look at the previous post and maybe I can figure out how to add the GPIO triggered DMA transfer.

    Please let me know whenever you have any question.

  • Hello,

    The HW team is reving to board to provide me a rising edge trigger for the DMA transfer.  It turns out there may be a possibility to have two H/W triggered DMA transfer using cyclic mode.  Due to what I believe that HW triggered DMA transfers are limited to a bank of GPIO,   please confirm that these GPIOs can be used.

    Board #1

    GPIO0-12  1KHz

    GPIO1-48  3.2KHz

    Board #2

    GPIO0-62 1KHz rate

    GPIO1-48  3.2KHz

    Thanks,

    Victor

  • Hi Victor,

    Due to what I believe that HW triggered DMA transfers are limited to a bank of GPIO,   please confirm that these GPIOs can be used.

    Sorry for the delay.

    My current implementation of HW triggering DMA actually uses GPIO pin interrupts, not bank interrupts. So You can pick any of the gpio pins for triggering DMA, and it won't affect gpio bank interrupts in Linux.