TDA4VH-Q1: What is the function of this internal data path in the system block diagram of CPSW9G

Hi,

hongyao.jin said:

What is the function of this internal data path? What can we do with it? Is there any difference between its function and that of IPC?

CPSW9G can be used from the Native Linux Driver running on A72 core, where A72 owns the complete CPSW9G for configuration and Data path.

In the case of CPSW9G with the ETHFW-based server and client model. Server configures the CPSW9G, whereas client cores like A72/MCU_R5F/Main_R5F can share the data path directly with switch using dedicated DMA channels allocated by Server.

Client cores can request the CPSW9G configuration, like ALE for filtering via IPC.

Along with configuration, we have Inter-core Virtual Ethernet communication where cores can transfer Ethernet packets to other via shared memory. It was supported only on RTOS/Linux client. 

In case of TDA4VH CPSW9G supports VEPA feature from H/W, due to which cores can transfer Ethenet traffic via Host Port to others. 

Please refer to the ETHFW User Guide for more details.
https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-j784s4/latest/exports/docs/ethfw/docs/user_guide/ethfw_c_ug_top.html#ethfw_intercore_eth

https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-j784s4/latest/exports/docs/ethfw/docs/user_guide/ethfw_c_ug_top.html#ethfw_intercore_vepa

Best Regards,
Sudheer