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AM62A3-Q1: How to get MR11 MR12 Value?

Part Number: AM62A3-Q1

Tool/software:

Hi James,

customer want to let micron help to do the simulation of LPDDR4, Micron need they provide below parameter: MR11 MR12 MR13 MR14 MR22

I let customer follow below link to read it, but it can't work on AM62A. so I need you help to provide the way to get those value.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1282946/tda4ve-q1-how-to-read-ddr-mr11-mr12-mr14-mr22-register/4878161?tisearch=e2e-sitesearch&keymatch=MR11#4878161

In TDA4, it will be same value, in AM62A, it is different value.

BR,

Biao

  • Hi James,

    can you help check this?

    BR,

    Biao

  • Biao, you can read these in the following registers for the operating frequency.  There is a value for each byte.  Note that MR12/MR14 are trained values.

    DENALI_PI_350 0x0F30A578 PI_MR11_DATA_F2_0
    DENALI_PI_351 0x0F30A57C PI_MR12_DATA_F2_0
    DENALI_PI_351 0x0F30A57C PI_MR14_DATA_F2_0
    DENALI_PI_351 0x0F30A57C PI_MR22_DATA_F2_0

    DENALI_PI_374 0x0F30A5D8 PI_MR11_DATA_F2_1
    DENALI_PI_375 0x0F30A5DC PI_MR12_DATA_F2_1
    DENALI_PI_375 0x0F30A5DC PI_MR14_DATA_F2_1
    DENALI_PI_375 0x0F30A5DC PI_MR22_DATA_F2_1

    DENALI_PI_398 0x0F30A638 PI_MR11_DATA_F2_2
    DENALI_PI_399 0x0F30A63C PI_MR12_DATA_F2_2
    DENALI_PI_399 0x0F30A63C PI_MR14_DATA_F2_2
    DENALI_PI_399 0x0F30A63C PI_MR22_DATA_F2_2

    DENALI_PI_422 0x0F30A698 PI_MR11_DATA_F2_3
    DENALI_PI_423 0x0F30A69C PI_MR12_DATA_F2_3
    DENALI_PI_423 0x0F30A69C PI_MR14_DATA_F2_3
    DENALI_PI_423 0x0F30A69C PI_MR22_DATA_F2_3

    Regards,

    James

  • Hi,James
         Regarding your previous answer, I have a question: According to Micron's reference values for MR11 and MR12, these should be 1-byte in size, but your reply mentioned a 4-byte value. Is that correct?

    Below are the register values I read out. Could you clarify what the corresponding values for MR11, MR12, MR14, and MR24 are?

    root@am62axx-evm:/opt/edgeai-gst-apps# devmem2 0x0F30A578
    Read at address  0x0F30A578 (0xffff90ee1578): 0x55000000
    
    root@am62axx-evm:/opt/edgeai-gst-apps# devmem2 0x0F30A57c
    Read at address  0x0F30A57C (0xffffa890b57c): 0x20162011
    
    root@am62axx-evm:/opt/edgeai-gst-apps# devmem2 0x0F30A5d8
    Read at address  0x0F30A5D8 (0xffff8eacd5d8): 0x55000000
    
    root@am62axx-evm:/opt/edgeai-gst-apps# devmem2 0x0F30A5dc
    Read at address  0x0F30A5DC (0xffff9b54e5dc): 0x20162B27
    
    root@am62axx-evm:/opt/edgeai-gst-apps# devmem2 0x0F30A638
    Read at address  0x0F30A638 (0xffff94126638): 0x55000000
    
    root@am62axx-evm:/opt/edgeai-gst-apps# devmem2 0x0F30A63c
    Read at address  0x0F30A63C (0xffff9ca5463c): 0x20162412
    
    root@am62axx-evm:/opt/edgeai-gst-apps# devmem2 0x0F30A698
    Read at address  0x0F30A698 (0xffff9f50a698): 0x55000000
    
    root@am62axx-evm:/opt/edgeai-gst-apps# devmem2 0x0F30A69c
    Read at address  0x0F30A69C (0xffff9173269c): 0x20162B27

    Regards,

    Yang

  • Yes, please use the TRM to extract the appropriate bit fields:

    Regards,

    James