DRA821U: Can is use all 4 SerDes lanes with this configuration?

Steve Turza

Part Number: DRA821U
Other Parts Discussed in Thread: DRA821

Tool/software:

I am using a DRA821U and have some concern about a NOTE that is in the datasheet.

On page 3 of the DRA821 Datasheet there is a bottom note that reads:

"B. SGMII, USB3.0, and PCIE share total of four SerDes lanes. A maximum of two of the three IP (for example, SGMII and USB) can be used concurrently."

I want to use all 4 SerDes lanes concurrently as below, is this possible?

Lane 0: PCIe Lane 0

Lane 1: SGMII Lane 4

Lane 2: SGMII Lane 1

Lane 3: USB 3.0

Thanks,

Steve

4 months ago

0 Takuma Fujiwara 4 months ago

TI__Guru 50873 points

Hi Steve,

Unfortunately, no. This hits the limitation coming from SerDes hardware. The supported configurations are listed in SDK docs here: https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-j7200/10_01_08_01/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/SERDES/SERDES.html

For a possible alternative, USB2.0 does not require a SerDes lane. So if you are fine not having USB3.0 speeds and USB2.0 speeds are tolerable, this is an option.

Regards,

Takuma

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DRA821U: Can is use all 4 SerDes lanes with this configuration?