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TDA4VH-Q1: SGMII without SERDES clock input

Part Number: TDA4VH-Q1

Tool/software:

Could you confirm that "internal reference clk" mentioned here, TDA4VH-Q1: SERDES REFCLK PPM - Processors forum - Processors - TI E2E support forums,

is referring to the fact that also SGMII interface have been validated by using internal PLLs and buffers within the SoC that is clocked only by an external oscillator connected to WKUP_OSC0? Meaning, SGMII is validated without using external SERDES clock?

  • SH, No external ref clk is used for our validation. The purpose of the internal ref clk is also to provide a low cost option for the customers to use an internally generated clk for the interfaces that is reliable and compliant to the stds while also saving board space and BOM cost.