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AM5718: Linux / RTOS Uart Configuration

Part Number: AM5718

Tool/software:

Dear TI team,

I'm working on a system that is using a AM5718 SoC, where we have a BSP on the A15 running Linux, and a M4 core (IPU1) running RTOS.

Between the two cores the IPC is working via MessageQ. I used the ex02_messageq example for DRA7XX_linux_elf to set it up. The IPU1 firmware is loaded via the remoteproc driver.

Now I would like to add a new task to the IPU1 RTOS for handling UART2. That's where I'm struggling, as I'm missing basic information, which I hope you could answer or confirm me:

  1. As Uart2 is used by IPU1, I need to add it to the linux device tree like this -> &uart2 { status = "disabled"; } ?
  2. The Pinmux for the UART2 pads I need to do as well in the DTS file? Or can it be done in the IPU1 RTOS firmware / A15 Linux application?
  3. The UART2 clocks need to be enabled in the IPU1 RTOS firmware right?
  4. Do I need to make the XBAR configuration for the UART interrupt in the DTS file or in the IPU1 RTOS firmware?

In my first trials I did:

  • &uart2 { status = "disabled"; }  in DTS file
  • Pinmux for UART2 in DTS (not sure if correctly done)
  • UART2 clocks enabled in IPU1 firmware
  • No XBAR configuration for UART2, because when using CSL_xbarIpuIrqConfigure() in IPU1 firmware, the IPU1 was crashing. 

Like this I manage to open the UART with UART_open(), which lead to a IPU1 crash earlier as well. But now the task is just blocking when using UART_write(). 

The only point I'm confident that it's done correctly is the UART2 clock enabling, which I did like this:

/* Enable clock for UART2 */
/* L2 MMU is configured such that MMU translates (virtual) 0x6X000000 access to address 0x4X000000 (physical) */

CSL_l4per_cm_core_componentRegs *l4PerCmReg =
(CSL_l4per_cm_core_componentRegs *) 0x6a009700; //CSL_MPU_L4PER_CM_CORE_REGS + 0x20000000 = 0x4a009700 + 0x20000000;


CSL_FINST(l4PerCmReg->CM_L4PER_UART2_CLKCTRL_REG,
L4PER_CM_CORE_COMPONENT_CM_L4PER_UART2_CLKCTRL_REG_MODULEMODE, ENABLE);

while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER_UART2_CLKCTRL_REG_IDLEST_FUNC !=
CSL_FEXT(l4PerCmReg->CM_L4PER_UART2_CLKCTRL_REG,
L4PER_CM_CORE_COMPONENT_CM_L4PER_UART2_CLKCTRL_REG_IDLEST));

It would be tremendously helpful if someone could give me some clarification on my different questions. If you could point me towards an example project that is using a similar setup, I would be greatfull as well. 

Best regards and big thanks in advance!

Marc

  • Hello Marc,

    1. This is correct.
    2. The whole init sequence for UART has to be done in RTOS, including the pinmux setup. According to the example below, this can be left to be done by U-boot.
    3. Yes, Since you are disabling this node in the Linux DT, the setup and initialization has to be done in RTOS.
    4. Also done in the RTOS file.

    See the example in the IPC chapter for UART: "Add IPC to the UART Example"

    Hope this helps,

    -Josue

  • Hello Josue,

    Thank you, I managed to set up the UART. Now I do have an issue with a GPIO interrupt, that I could need your help.

    The pinmux, clock, and XBAR are done like this in the RTOS application:

    /* L2 MMU is configured such that MMU translates (virtual) 0x6X000000 access to address 0x4X000000 (physical) */
    /* Offset of 0x20000000 must be used to access registers */
    
    /* Pinmux for gpio1_17 - IOPHY_WAKE */
    /*Pad configurations */
    HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS + 0x20000000 + CSL_CONTROL_CORE_PAD_IO_PAD_UART2_RTSN,0x000F000E);
    
    
    /* Enable clock for GPIO1 */
    CSL_wkupaon_cmRegs *wkupAonCmReg =
    (CSL_wkupaon_cmRegs *) 0x6ae07800; //CSL_MPU_WKUPAON_CM_REGS + 0x20000000 = 0x4ae07800 + 0x20000000;
    
    CSL_FINST(wkupAonCmReg->CM_WKUPAON_GPIO1_CLKCTRL_REG,
    WKUPAON_CM_CM_WKUPAON_GPIO1_CLKCTRL_REG_MODULEMODE, AUTO);
    
    while(CSL_WKUPAON_CM_CM_WKUPAON_GPIO1_CLKCTRL_REG_IDLEST_FUNC !=
    CSL_FEXT(wkupAonCmReg->CM_WKUPAON_GPIO1_CLKCTRL_REG,
    WKUPAON_CM_CM_WKUPAON_GPIO1_CLKCTRL_REG_IDLEST));
    
    
    if (xbarIrq_gpio == CSL_XBAR_GPIO1_IRQ_1)
    {
    /* Use reserved CSL_XBAR_INST_IPU1_IRQ_51 */
    CSL_xbarIpuIrqConfigure(1,
    CSL_XBAR_INST_IPU1_IRQ_51,
    xbarIrq_gpio);
    }
    
    /* GPIO initialization */
    GPIO_init();
    
    /* Set the callback function */
    GPIO_setCallback(WAKEUP_PIN, AppGpioCallbackFxn);
    
    /* Enable GPIO interrupt on the specific gpio pin */
    GPIO_enableInt(WAKEUP_PIN);

    Once the interrupt is triggered on the input pin and the callback function is called, I see the following messages in the A15 linux log:

    [ 205.761322] remoteproc remoteproc0: powering up 58820000.ipu
    [ 205.778594] remoteproc remoteproc0: Booting fw image ipu1, size 4990712
    [ 205.785430] omap-iommu 58882000.mmu: 58882000.mmu: version 2.1
    [ 205.816864] rproc-virtio rproc-virtio.1.auto: assigned reserved memory nod e ipu1-memory@9d000000
    [ 205.842041] virtio_rpmsg_bus virtio0: rpmsg host is online
    [ 205.847595] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x 3d
    [ 205.870971] rproc-virtio rproc-virtio.1.auto: registered virtio0 (type 7)
    [ 205.877807] remoteproc remoteproc0: remote processor 58820000.ipu is now u p
    [ 225.507995] ------------[ cut here ]------------
    [ 225.512634] WARNING: CPU: 0 PID: 0 at /drivers/gpio/gpio-omap.c:573 omap_g pio_irq_handler+0x194/0x198
    [ 225.521942] gpio irq96 while runtime suspended?
    [ 225.526489] Modules linked in: xhci_plat_hcd xhci_hcd dwc3 phy_omap_usb2 t i_vip ti_vpe ti_sc v4l2_mem2mem ti_csc ti_vpdma ti_cal dwc3_omap v4l2_fwnode videobuf2_dma_contig videobuf2_memops videobuf2_v4l2 videobuf2_common mlx7512 3(O) v4l2_async videodev mc 8188eu(O) cfg80211 usbcore
    [ 225.551696] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G O 6.1 .83-ti-gc1c2f1971fbf #1
    [ 225.560607] Hardware name: Generic DRA72X (Flattened Device Tree)
    [ 225.566741] unwind_backtrace from show_stack+0x10/0x14
    [ 225.572021] show_stack from dump_stack_lvl+0x40/0x4c
    [ 225.577117] dump_stack_lvl from __warn+0x78/0x158
    [ 225.581970] __warn from warn_slowpath_fmt+0x130/0x1c0
    [ 225.587127] warn_slowpath_fmt from omap_gpio_irq_handler+0x194/0x198
    [ 225.593627] omap_gpio_irq_handler from __handle_irq_event_percpu+0x60/0x2 20
    [ 225.600708] __handle_irq_event_percpu from handle_irq_event+0x38/0x80
    [ 225.607299] handle_irq_event from handle_fasteoi_irq+0x9c/0x204
    [ 225.613342] handle_fasteoi_irq from generic_handle_domain_irq+0x28/0x38
    [ 225.620086] generic_handle_domain_irq from gic_handle_irq+0x74/0x88
    [ 225.626495] gic_handle_irq from generic_handle_arch_irq+0x34/0x44
    [ 225.632720] generic_handle_arch_irq from __irq_svc+0x88/0xc8
    [ 225.638519] Exception stack(0xc0f01ee8 to 0xc0f01f30)
    [ 225.643585] 1ee0: 00000005 00000000 fe600000 00000000 c0 f08840 c104ce20
    [ 225.651824] 1f00: c0f04d10 c0f04d6c 00000000 c0e79be8 00000000 c0f04d78 c1 054310 c0f01f38
    [ 225.660034] 1f20: c0123080 c01080a4 600f0013 ffffffff
    [ 225.665100] __irq_svc from arch_cpu_idle+0x20/0x3c
    [ 225.670013] arch_cpu_idle from default_idle_call+0x3c/0x114
    [ 225.675720] default_idle_call from do_idle+0x200/0x294
    [ 225.680999] do_idle from cpu_startup_entry+0x28/0x2c
    [ 225.686096] cpu_startup_entry from rest_init+0xc8/0xcc
    [ 225.691375] rest_init from arch_post_acpi_subsys_init+0x0/0x8
    [ 225.697265] ---[ end trace 0000000000000000 ]---
    [ 225.837036] irq 96: nobody cared (try booting with the "irqpoll" option)
    [ 225.843780] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W O 6.1 .83-ti-gc1c2f1971fbf #1
    [ 225.852691] Hardware name: Generic DRA72X (Flattened Device Tree)
    [ 225.858825] unwind_backtrace from show_stack+0x10/0x14
    [ 225.864074] show_stack from dump_stack_lvl+0x40/0x4c
    [ 225.869171] dump_stack_lvl from __report_bad_irq+0x3c/0xc0
    [ 225.874786] __report_bad_irq from note_interrupt+0x284/0x2d0
    [ 225.880554] note_interrupt from handle_irq_event+0x7c/0x80
    [ 225.886169] handle_irq_event from handle_fasteoi_irq+0x9c/0x204
    [ 225.892242] handle_fasteoi_irq from generic_handle_domain_irq+0x28/0x38
    [ 225.898986] generic_handle_domain_irq from gic_handle_irq+0x74/0x88
    [ 225.905364] gic_handle_irq from generic_handle_arch_irq+0x34/0x44
    [ 225.911590] generic_handle_arch_irq from __irq_svc+0x88/0xc8
    [ 225.917388] Exception stack(0xc0f01ee8 to 0xc0f01f30)
    [ 225.922454] 1ee0: 00000005 00000000 fe600000 00000000 c0 f08840 c104ce20
    [ 225.930694] 1f00: c0f04d10 c0f04d6c 00000000 c0e79be8 00000000 c0f04d78 c1 054310 c0f01f38
    [ 225.938903] 1f20: c0123080 c01080a4 600f0013 ffffffff
    [ 225.944000] __irq_svc from arch_cpu_idle+0x20/0x3c
    [ 225.948913] arch_cpu_idle from default_idle_call+0x3c/0x114
    [ 225.954589] default_idle_call from do_idle+0x200/0x294
    [ 225.959869] do_idle from cpu_startup_entry+0x28/0x2c
    [ 225.964965] cpu_startup_entry from rest_init+0xc8/0xcc
    [ 225.970245] rest_init from arch_post_acpi_subsys_init+0x0/0x8
    [ 225.976104] handlers:
    [ 225.978393] [<fed122e0>] omap_gpio_irq_handler
    [ 225.982879] Disabling IRQ #96

    It looks like the A15 is interacting and disables the IRQ. Do you know why and how I can avoid this from happening?

    Thank you for the help.

    Best regards,

    Marc

  • Hello,

    I am out of office for business travel. Please expect some delay in response.

    -Josue

  • Hi Marc,

    I am assuming you are probably using a GPIO thaqt is already used by Linux and causing a conflict. Double check that the GPIO is not already used.

    Also, Usually, for a different subject, you should open a new thread.

    Best,

    Josue