Part Number: AM5718
Tool/software:
Dear TI team,
I'm working on a system that is using a AM5718 SoC, where we have a BSP on the A15 running Linux, and a M4 core (IPU1) running RTOS.
Between the two cores the IPC is working via MessageQ. I used the ex02_messageq example for DRA7XX_linux_elf to set it up. The IPU1 firmware is loaded via the remoteproc driver.
Now I would like to add a new task to the IPU1 RTOS for handling UART2. That's where I'm struggling, as I'm missing basic information, which I hope you could answer or confirm me:
- As Uart2 is used by IPU1, I need to add it to the linux device tree like this -> &uart2 { status = "disabled"; } ?
- The Pinmux for the UART2 pads I need to do as well in the DTS file? Or can it be done in the IPU1 RTOS firmware / A15 Linux application?
- The UART2 clocks need to be enabled in the IPU1 RTOS firmware right?
- Do I need to make the XBAR configuration for the UART interrupt in the DTS file or in the IPU1 RTOS firmware?
In my first trials I did:
- &uart2 { status = "disabled"; } in DTS file
- Pinmux for UART2 in DTS (not sure if correctly done)
- UART2 clocks enabled in IPU1 firmware
- No XBAR configuration for UART2, because when using CSL_xbarIpuIrqConfigure() in IPU1 firmware, the IPU1 was crashing.
Like this I manage to open the UART with UART_open(), which lead to a IPU1 crash earlier as well. But now the task is just blocking when using UART_write().
The only point I'm confident that it's done correctly is the UART2 clock enabling, which I did like this:
/* Enable clock for UART2 */
/* L2 MMU is configured such that MMU translates (virtual) 0x6X000000 access to address 0x4X000000 (physical) */
CSL_l4per_cm_core_componentRegs *l4PerCmReg =
(CSL_l4per_cm_core_componentRegs *) 0x6a009700; //CSL_MPU_L4PER_CM_CORE_REGS + 0x20000000 = 0x4a009700 + 0x20000000;
CSL_FINST(l4PerCmReg->CM_L4PER_UART2_CLKCTRL_REG,
L4PER_CM_CORE_COMPONENT_CM_L4PER_UART2_CLKCTRL_REG_MODULEMODE, ENABLE);
while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER_UART2_CLKCTRL_REG_IDLEST_FUNC !=
CSL_FEXT(l4PerCmReg->CM_L4PER_UART2_CLKCTRL_REG,
L4PER_CM_CORE_COMPONENT_CM_L4PER_UART2_CLKCTRL_REG_IDLEST));
It would be tremendously helpful if someone could give me some clarification on my different questions. If you could point me towards an example project that is using a similar setup, I would be greatfull as well.
Best regards and big thanks in advance!
Marc