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CPU vs EMIF mapping



We are using a 5515 that is connected to asynchronous external memory.  I am confused with the mapping between the CPU address and the external memory address.

According to the EMIF Users Guide, EM_BA0 = NC, EM_BA1 = MA0, EM_A0..A20 = MA1..21. (MA = memory address)

Lets say I have a pointer to the beginning of my memory at 0x490000.

int *addr = 0x490000;

addr[0] = 0x1234;  // cpu address is 0x490000, what would MA0-MA21 be?

addr[1] = 0x1234;  // cpu address is 0x490001, what would MA0-MA21 be?

  • Robert,

    It looks like you are accessing CS2 External space for a 16-bit async external memory. From the point of view of the CPU, this address space starts at 0x400 000 word address (0x800 000 byte address). This is translated by the EMIF logic to the appropriate address to the memory device starting from the base address of 0x0. Table 1-26, page 43 in the EMIF users guide (link) shows how a CPU word address (EM_A[21:0]) is driven on the EMIF address pins.

    In your example:

    CPU word address (CPUWA) = 0x490 000; EM[A20:A1] = CPUWA[21:1]  & EM_BA1 = CPUWA[0], hence MA[21:0] = 0x090 000

    CPU word address (CPUWA) = 0x490 001; EM[A20:A1] = CPUWA[21:1]  & EM_BA1 = CPUWA[0], hence MA[21:0] = 0x090 001

    Regards,

    Sunil Kamath