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AM62A7: how to change the SOC MIPI line from 2lane to 4 lane

Part Number: AM62A7

Tool/software:

in the evm board. The SOC set the MIPI line is two line. Right now I need to set the line to 4 line.  and i change the line to 4 line.

but I do not know how to set the clock-frequency and link-frequencies. how to set this two data.  did there any guide to set this two data. thanks very much

and after set this dts file. the ub953 should be set line number. and did there are some other setting should be config?

clock-frequency = <25000000>;

data-lanes = <1 2 3 4>;
link-frequencies = /bits/ 64 <800000000>;

  • Hi Meng,

    clock-frequency = <25000000>;

    This is the I2C bus frequency and you should keep 24000000.

    link-frequencies = /bits/ 64 <800000000>;

    Please refer to https://docs.kernel.org/driver-api/media/tx-rx.html#pixel-rate for the calculation of link frequency. Since D-PHY is used in AM62A CSIRX, the formula should be:

    pixel_rate = link_freq * 2 * nr_of_lanes / bits_per_pixel, or
    link_freq = pixel_rate * bits_per_pixel / 2 / nr_of_lanes , where pixel_rate = width*height*fps.
    
    

    I don't think you'll need 800MHz here.  For example, if you have 3MP@60fps with 10-bit RAW, then you have

    link_freq = 180MP/s * 10 / 2 / 4 = 225MHz. So you can continue to use the 456MHz.

    Regards,

    Jianzhong